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Mahapatra, Ipsita Biswas and Nandy, SK (2018) An Algorithm - Architecture Co-Designed System for Dynamic Execution-Driven Pre-Silicon Verification. In: 2018 IEEE International Reliability Physics Symposium, IRPS 2018; Burlingame; United States; 11 March, 11-15 March 2018, Burlingame, CA, USA, pp. 85-89.
Mahapatra, Ipsita Biswas and Agarwal, Utkarsh and Nandy, SK (2018) DFG partitioning algorithms for coarse grained reconfigurable array assisted RTL simulation accelerators. In: IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT), MAR 16-17, 2018, Bangalore, INDIA. (In Press)
Natarajan, Santhi and KrishnaKumar, N and Pavan, M and Pal, Debnath and Nandy, SK (2018) ReneGENE-DP: Accelerated Parallel Dynamic Programming for Genome Informatics. In: IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT), MAR 16-17, 2018, Bangalore, INDIA.
Merchant, Farhad and Vatwani, Tarun and Chattopadhyay, Anupam and Raha, Soumyendu and Nandy, SK and Narayan, Ranjani (2016) Achieving Efficient QR Factorization by Algorithm-Architecture Co-Design of Householder Transformation. In: 29th International Conference on VLSI DESIGN / 15th International Conference on Embedded Systems (VLSID), JAN 04-08, 2016, Kolkata, INDIA, pp. 98-103.
Merchant, Farhad and Choudhary, Nimash and Nandy, SK and Narayan, Ranjani (2016) Efficient Realization of Table Look-up based Double Precision Floating Point Arithmetic. In: 29th International Conference on VLSI DESIGN / 15th International Conference on Embedded Systems (VLSID), JAN 04-08, 2016, Kolkata, INDIA, pp. 415-420.
Madhu, Kavitha T and Das, Saptarsi and Nalesh, S and Nandy, SK and Narayan, Ranjani (2015) Compiling HPC Kernels for the REDEFINE CGRA. In: 2015 IEEE 17th International Conference on High Performance Computing and Communications (HPCC), AUG 24-26, 2016, Int Symposium Cyberspace Safety & Secur, New York, NY, pp. 405-410.
Nalesh, S and Madhu, Kavitha T and Das, Saptarsi and Nandy, SK and Narayan, Ranjani (2015) Energy Aware Synthesis of Application Kernels expressed in Functional Languages on a Coarse Grained Composable Reconfigurable Array. In: IEEE International Symposium on Nanoelectronic and Information Systems, DEC 21-23, 2015, Indore, INDIA, pp. 7-12.
Kachore, Vaibhav Ankush and Lakshmi, J and Nandy, SK (2015) LOCATION OBFUSCATION FOR LOCATION DATA PRIVACY. In: IEEE 11th World Congress on Services, JUN 27-JUL 02, 2015, New York, NY, pp. 213-220.
Biswas, Arnab Kumar and Nandy, SK and Narayan, Ranjani (2015) Network-on-Chip Router attacks and their prevention in MP-SoCs with multiple Trusted Execution Environments. In: IEEE International Conference on Electronics Computing and Communication Technologies (CONECCT), JUL 10-11, 2015, Bangalore, INDIA.
Mahapatra, Ipsita Biswas and Natarajan, Santhi and Nalesh, S and Nandy, SK (2015) SIMAAH: RTL simulation accelerator for complex SoC's. In: IEEE International Conference on Electronics Computing and Communication Technologies (CONECCT), JUL 10-11, 2015, JUL 10-11, 2015.
Mahadurkar, Mahesh and Merchant, Farhad and Maity, Arka and Vatwani, Kapil and Munje, Ishan and Gopalan, Nandhini and Nandy, SK and Narayan, Ranjani (2014) Co-Exploration of NLA Kernels and Specification of Compute Elements in Distributed Memory CGRAs. In: International Conference on Embedded Computer Systems - Architectures, Modeling, and Simulation (SAMOS), JUL 14-17, 2014, Samos, GREECE, pp. 225-232.
Merchant, Farhad and Chattopadhyay, Anupam and Garga, Ganesh and Nandy, SK and Narayan, Ranjani and Gopalan, Nandhini (2014) Efficient QR Decomposition Using Low Complexity Column-wise Givens Rotation (CGR). In: 27th International Conference on VLSI Design / 13th International Conference on Embedded Systems (VLSID), JAN 05-09, 2014, Mumbai, INDIA, pp. 258-263.
Madhu, Kavitha T and Das, Saptarsi and Krishna, Madhava C and Nalesh, S and Nandy, SK and Narayan, Ranjani (2014) Synthesis of Instruction Extensions on HyperCell, a Reconfigurable Datapath. In: International Conference on Embedded Computer Systems - Architectures, Modeling, and Simulation (SAMOS), JUL 14-17, 2014, Samos, GREECE, pp. 215-224.
Kala, S and Nalesh, S and Nandy, SK and Narayan, Ranjani (2013) Design of a Low Power 64 Point FFT Architecture for WLAN Applications. In: 25th International Conference on Microelectronics (ICM), DEC 15-18, 2013, Beirut, LEBANON.
Dhingra, Mohit and Lakshmi, J and Nandy, SK and Bhattacharyya, Chiranjib and Gopinath, K (2013) Elastic Resources Framework in IaaS, preserving performance SLAs. In: IEEE 6th International Conference on Cloud Computing (CLOUD), JUN 27-JUL 03, 2013, Santa Clara, CA, pp. 430-437.
Kala, S and Nalesh, S and Maity, Arka and Nandy, SK and Narayan, Ranjani (2013) High Throughput, Low Latency, Memory Optimized 64K Point FFT Architecture using Novel Radix-4 Butterfly Unit. In: IEEE International Symposium on Circuits and Systems (ISCAS), MAY 19-23, 2013, Beijing, PEOPLES R CHINA, pp. 3034-3037.
Anand, Ankit and Dhingra, Mohit and Lakshmi, J and Nandy, SK (2012) Resource usage monitoring for KVM based virtual machines. In: 18th Annual International Conference on Advanced Computing and Communications (ADCOM), DEC 14-16, 2012 , Bangalore, INDIA , pp. 66-70.
Rao, Adarsha and Nandy, SK and Deprettere, Ed F and Nikolov, Hristo (2011) USHA: unified software and hardware architecture for video decoding. In: 2011 IEEE 9th Symposium on Application Specific Processors (SASP), 5-6 June 2011, San Diego, CA, USA.
Das, Saptarsi and Varadarajan, Keshavan and Garga, Ganesh and Mondal, Rajdeep and Narayan, Ranjani and Nandy, SK (2011) A method for flexible reduction over binary fields using a field multiplier. In: SECRYPT 2011 - Proceedings of the International Conference on Security and Cryptography, 18-21 July, Seville, Spain.
Kulkarni, V and Emelyanov, P and Ponomaryov, D and Krishna, M and Raha, S and Nandy, SK (2019) Parallel Factorization of Boolean Polynomials. In: 12th International Andrei P. Ershov Informatics Conference, PSI 2019; Novosibirsk; Russian Federation, 2-5 July 2019, Novosibirsk; Russian Federation, pp. 80-94.
Singh, R and Ranga, SV and Patil, S and Krishna, M and Mehta, M and Anoop, MN and Nandy, SK and Haldar, C and Narayan, R and Neumann, F and Baufreton, P (2019) Micro-Architectural support for High Availability of NoC-based MP-SoC. In: 2019 IEEE/AIAA 38th Digital Avionics Systems Conference (DASC), 8-12 Sept. 2019, San Diego, CA, USA, USA.
Khamvilai, T and Sutter, L and Mains, JB and Feron, E and Baufreton, P and Neumann, F and Krishna, M and Nandy, SK and Narayan, R and Haldar, C (2019) Task Allocation of Safety-Critical Applications on Reconfigurable Multi-Core Architectures with an Application on Control of Propulsion System. In: 2019 IEEE/AIAA 38th Digital Avionics Systems Conference (DASC), 8-12 Sept. 2019, San Diego, CA, USA, USA.
Merchant, F and Vatwani, T and Chattopadhyay, A and Raha, S and Nandy, SK and Narayan, R and Leupers, R (2019) Applying modified householder transform to Kalman filter. In: 32nd International Conference on VLSI Design,, 5 January 2019 - 9 January 2019, New Delhi, pp. 431-436.
Merchant, F and Vatwani, T and Chattopadhyay, A and Raha, S and Nandy, SK and Narayan, R and Leupers, R (2019) A systematic approach for acceleration of matrix-vector operations in cgra through algorithm-architecture co-design. In: 32nd International Conference on VLSI Design, VLSID 2019, 5 January 2019 - 9 January 2019, New Delhi, pp. 64-69.
Sutter, Louis and Khamvilai, Thanakorn and Monmousseau, Philippe and Mains, John B and Feron, Eric and Baufreton, Philippe and Neumann, Francois and Krishna, Madhava and Nandy, SK and Narayan, Ranjani and Haldar, Chandan (2018) Experimental Allocation of Safety-Critical Applications on Reconfigurable Multi-Core Architecture. In: IEEE/AIAA 37th Digital Avionics Systems Conference (DASC), SEP 23-27, 2018, London, ENGLAND, pp. 833-842.
Natarajan, S and KrishnaKumar, N and Anuchan, HV and Pal, D and Nandy, SK (2018) ReneGENE-Novo: Co-designed algorithm-architecture for accelerated preprocessing and assembly of genomic short reads. In: 14th International Symposium on Applied Reconfigurable Computing, ARC 2018, 2 - 4 May 2018, Santorini, pp. 564-577.
Merchant, F and Vatwani, T and Chattopadhyay, A and Raha, S and Nandy, SK and Narayan, R (2018) Achieving efficient realization of kalman filter on CGRA through algorithm-architecture co-design. In: 14th International Symposium on Applied Reconfigurable Computing, ARC 2018, 2 - 4 May 2018, Santorini, pp. 119-131.
Mahapatra, IB and Agarwal, U and Azad, C and Nandy, SK (2018) Design Space Exploration of an Execution-Driven Functional Simulation Methodology. In: 31st International Conference on VLSI Design, VLSID 2018, 6 - 10 January 2018, Pune, pp. 295-300.
Guillaumet, Tom and Feron, Eric and Baufreton, Philippe and Neumann, Francois and Madhu, Kavitha and Krishna, Madhava and Nandy, SK and Narayan, Ranjani and Haldar, Chandan (2017) Task Allocation of Safety-Critical Applications on Reconfigurable Multi-Core Architectures. In: 2017 IEEE/AIAA 36TH DIGITAL AVIONICS SYSTEMS CONFERENCE (DASC) , SEP 17-21, 2017, St Petersburg, FL.
Mohammadi, Mahnaz and Satpute, Nitin and Ronge, Rohit and Chandiramani, Jayesh Ramesh and Nandy, SK and Raihan, Aamir and Verma, Tanmay and Narayan, Ranjani and Bhattacharya, Sukumar (2015) A Flexible Scalable Hardware Architecture for Radial Basis Function Neural Networks. In: 28th International Conference on VLSI Design (VLSID) / 14th International Conference on Embedded Systems, JAN 03-07, 2015, Bangalore, INDIA, pp. 505-510.
Mahale, Gopinath and Mahale, Hamsika and Goel, Arnav and Nandy, SK and Bhattacharya, S and Narayan, Ranjani (2015) Hardware Solution For Real-time Face Recognition. In: 28th International Conference on VLSI Design (VLSID) / 14th International Conference on Embedded Systems, JAN 03-07, 2015, Bangalore, INDIA, pp. 81-86.
Merchant, Farhad and Maity, Arka and Mahadurkar, Mahesh and Vatwani, Kapil and Munje, Ishan and Krishna, Madhava and Nalesh, S and Gopalan, Nandhini and Raha, Soumyendu and Nandy, SK and Narayan, Ranjani (2015) Micro-architectural Enhancements in Distributed Memory CGRAs for LU and QR Factorizations. In: 28th International Conference on VLSI Design (VLSID) / 14th International Conference on Embedded Systems, JAN 03-07, 2015, Bangalore, INDIA, pp. 153-158.
Dhingra, Mohit and Lakshmi, J and Nandy, SK (2012) Resource Usage Monitoring in Clouds. In: ACM/IEEE 13th International Conference on Grid Computing, 20-23 September 2012, Beijing, China.
Krishnamoorthy, Ratna and Varadarajan, Keshavan and Fujita, Masahiro and Nandy, SK (2011) Spatio-temporal computation on a coarse grained reconfigurable architecture. In: 7th International Symposium on Applied Reconfigurable Computing, 23-25 March 2011, Belfast, United Kingdom.
Ferraz, O and Subramaniyan, S and Chinthalaa, R and Andrade, J and Cavallaro, JR and Nandy, SK and Silva, V and Zhang, X and Purnaprajna, M and Falcao, G (2022) A Survey on High-Throughput Non-Binary LDPC Decoders: ASIC, FPGA, and GPU Architectures. In: IEEE Communications Surveys and Tutorials, 24 (1). pp. 524-556.
Emelyanov, PG and Krishna, M and Kulkarni, V and Nandy, SK and Ponomaryov, DK and Raha, S (2021) Factorization of Boolean Polynomials: Parallel Algorithms and Experimental Evaluation. In: Programming and Computer Software, 47 (2). pp. 108-118.
Natarajan, S and Krishna Kumar, N and Pal, D and Nandy, SK (2020) Towards Accelerated Genome Informatics on Parallel HPC Platforms: The ReneGENE-GI Perspective. In: Journal of Signal Processing Systems, 92 (10). pp. 1197-1213.
Mahapatra, IB and Nandy, SK (2019) Ex-Drive: An execution driven functional verification flow. In: Journal of Low Power Electronics, 15 (2). pp. 168-181.
Merchant, Farhad and Chattopadhyay, Anupam and Raha, Soumyendu and Nandy, SK and Narayan, Ranjani (2017) Accelerating BLAS and LAPACK via Efficient Floating Point Architecture Design. In: Parallel Processing Letters, 27 (3-4). ISSN 0129-6264
Mahale, Gopinath and Mahale, Hamsika and Nandy, SK and Narayan, Ranjani (2016) REFRESH: REDEFINE for Face Recognition Using SURE Homogeneous Cores. In: IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS, 27 (12). pp. 3602-3616.
Biswas, Arnab Kumar and Nandy, SK (2016) Role based shared memory access control mechanisms in NoC based MP-SoC. In: NANO COMMUNICATION NETWORKS, 7 . pp. 46-64.
Biswas, Arnab Kumar and Nandy, SK and Narayan, Ranjani (2015) Router Attack toward NoC-enabled MPSoC and Monitoring Countermeasures against such Threat. In: CIRCUITS SYSTEMS AND SIGNAL PROCESSING, 34 (10). pp. 3241-3290.
Das, Saptarsi and Madhu, Kavitha and Krishna, Madhav and Sivanandan, Nalesh and Merchant, Farhad and Natarajan, Santhi and Biswas, Ipsita and Pulli, Adithya and Nandy, SK and Narayan, Ranjani (2014) A framework for post-silicon realization of arbitrary instruction extensions on reconfigurable data-paths. In: JOURNAL OF SYSTEMS ARCHITECTURE, 60 (7). pp. 592-614.
