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Achieving efficient realization of kalman filter on CGRA through algorithm-architecture co-design

Merchant, F and Vatwani, T and Chattopadhyay, A and Raha, S and Nandy, SK and Narayan, R (2018) Achieving efficient realization of kalman filter on CGRA through algorithm-architecture co-design. In: 14th International Symposium on Applied Reconfigurable Computing, ARC 2018, 2 - 4 May 2018, Santorini, pp. 119-131.

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Official URL: https://doi.org/10.1007/978-3-319-78890-6_10


In this paper, we present efficient realization of Kalman Filter (KF) that can achieve up to 65 of the theoretical peak performance of underlying architecture platform. KF is realized using Modified Faddeeva Algorithm (MFA) as a basic building block due to its versatility and REDEFINE Coarse Grained Reconfigurable Architecture (CGRA) is used as a platform for experiments since REDEFINE is capable of supporting realization of a set algorithmic compute structures at run-time on a Reconfigurable Data-path (RDP). We perform several hardware and software based optimizations in the realization of KF to achieve 116 improvement in terms of Gflops over the first realization of KF. Overall, with the presented approach for KF, 4-105x performance improvement in terms of Gflops/watt over several academically and commercially available realizations of KF is attained. In REDEFINE, we show that our implementation is scalable and the performance attained is commensurate with the underlying hardware resources.

Item Type: Conference Paper
Publication: Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Publisher: Springer Verlag
Additional Information: The copyright for this article belongs to the Springer Verlag.
Keywords: Bandpass filters; Calculations; Computer hardware; Embedded systems; Hardware; Kalman filters, Algorithm architectures; Architecture platforms; Basic building block; Coarse grained reconfigurable architecture; Hardware and software; Hardware resources; Parallelism; Performance improvements, Reconfigurable architectures
Department/Centre: Division of Interdisciplinary Sciences > Computational and Data Sciences
Date Deposited: 02 Sep 2022 10:28
Last Modified: 02 Sep 2022 10:28
URI: https://eprints.iisc.ac.in/id/eprint/76375

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