ePrints@IIScePrints@IISc Home | About | Browse | Latest Additions | Advanced Search | Contact | Help

Task Allocation of Safety-Critical Applications on Reconfigurable Multi-Core Architectures

Guillaumet, Tom and Feron, Eric and Baufreton, Philippe and Neumann, Francois and Madhu, Kavitha and Krishna, Madhava and Nandy, SK and Narayan, Ranjani and Haldar, Chandan (2017) Task Allocation of Safety-Critical Applications on Reconfigurable Multi-Core Architectures. In: 2017 IEEE/AIAA 36TH DIGITAL AVIONICS SYSTEMS CONFERENCE (DASC) , SEP 17-21, 2017, St Petersburg, FL.

[img] PDF
IEEE_DFig_Avi_2017.pdf - Published Version
Restricted to Registered users only

Download (1MB) | Request a copy
Official URL: http://dx.doi.org/10.1109/DASC.2017.8101992

Abstract

With the onset of multi-core chips, the single-core market is closing down. Developing avionics systems hosted on multi-core chips that enforce safety-criticality constraints constitutes a challenge for the aerospace industry. This paper presents a reconfigurable multi-core architecture and studies its suitability for hosting safety-critical embedded applications. A task allocation algorithm for this specific architecture is proposed, and the last section demonstrates its behavior and analyzes its efficiency.

Item Type: Conference Paper
Series.: IEEE-AIAA Digital Avionics Systems Conference
Publisher: 10.1109/DASC.2017.8101992
Additional Information: 36th IEEE/AIAA Digital Avionics Systems Conference (DASC), St Petersburg, FL, SEP 17-21, 2017 Copy right for this article belongs to the IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA
Department/Centre: Others
Date Deposited: 12 Jan 2018 10:02
Last Modified: 12 Jan 2018 10:02
URI: http://eprints.iisc.ac.in/id/eprint/58620

Actions (login required)

View Item View Item