Browse by IISc Authors

Conference Paper

Yadav, S and Kumar, M and Sajin, S and Garag, SS and Varghese, K (2024) Synchronization Support in 64-bit Out-Of-Order Superscalar Dual-Core RISC-V Processor. In: 9th IEEE International Conference for Convergence in Technology, I2CT 2024, 5 April 2024 through 7 April 2024, Pune, India.

Ram, SS and Varghese, K (2023) Efficient Hardware Design of Parameterized Posit Multiplier and Posit Adder. In: UNSPECIFIED, pp. 343-347.

Ajay, S and Praveen, VS and Varghese, K (2023) An FPGA Based Accelerator of the Bi-Directional Wavefront Algorithm for Pairwise Sequence Alignment. In: UNSPECIFIED, pp. 40-44.

Prasad, AB and Varghese, K (2023) High Throughput Hardware Acceleration for Image Generation using HLS. In: UNSPECIFIED, pp. 309-313.

Ram, D and Panwar, S and Varghese, K (2022) Hardware Accelerator for Capsule Network based Reinforcement Learning. In: 35th International Conference on VLSI Design, VLSID 2022 - held concurrently with 2022 21st International Conference on Embedded Systems, ES 2022, 26 February - 2 March 2022, Virtual, Online, pp. 162-167.

Chander, VN and Varghese, K (2022) A Soft RISC-V Vector Processor for Edge-AI. In: 35th International Conference on VLSI Design, VLSID 2022 - held concurrently with 2022 21st International Conference on Embedded Systems, ES 2022, 26 Feb- 2 March 2022, Virtual, Online, pp. 263-268.

Antony, A and Devi, A and Varghese, K (2021) High Throughput Hardware for Hoeffding Tree Algorithm with Adaptive Naive Bayes Predictor. In: 6th International Conference for Convergence in Technology, I2CT 2021,, 2-4Apr 2021, Pune.

Gokulan, T and Muraleedharan, A and Varghese, K (2020) Design of a 32-bit, dual pipeline superscalar RISC-V processor on FPGA. In: Proceedings - Euromicro Conference on Digital System Design, DSD 2020, 26-28 August 2020, Kranj; Slovenia, pp. 340-343.

Clere, SR and Sethumadhavan, S and Varghese, K (2018) FPGA based reconfigurable coprocessor for deep convolutional neural network training. In: 21st Euromicro Conference on Digital System Design, DSD 2018, 29 - 31 August 2018, Prague, pp. 381-388.