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Kumar, K and Raghunath, KP and Muraleedharan, A and Gaggatur, JS and Banerjee, G (2019) A 75-µW 2.4 GHz wake-up receiver in 65-nm CMOS for neonatal healthcare application. In: 32nd International Conference on VLSI Design, VLSID 2019, 5 January 2019 - 9 January 2019, New Delhi, pp. 287-292.
Merchant, F and Vatwani, T and Chattopadhyay, A and Raha, S and Nandy, SK and Narayan, R and Leupers, R (2019) Applying modified householder transform to Kalman filter. In: 32nd International Conference on VLSI Design,, 5 January 2019 - 9 January 2019, New Delhi, pp. 431-436.
Brahma, M and Kabiraj, A and Mahapatra, S (2019) Insights on anisotropic dissipative quantum transport in n-type Phosphorene MOSFET. In: 32nd International Conference on VLSI Design, VLSID 201, 5 January 2019 - 9 January 2019, New Delhi, pp. 179-184.
Jain, V and Gupta, SK and Khatri, V and Banerjee, G (2019) A 19.3-24.8 GHz dual-slope VCO in 65-nm CMOS for automotive radar applications. In: 32nd International Conference on VLSI Design, VLSID 2019, 5 January 2019 - 9 January 2019, New Delhi, pp. 118-123.
Prasanth, V and Parekhji, R and Amrutur, B (2019) Perturbation based workload augmentation for comprehensive functional safety analysis. In: 32nd International Conference on VLSI Design, VLSID 2019, 5 January 2019-9 January 2019, New Delhi, pp. 293-298.
Merchant, F and Vatwani, T and Chattopadhyay, A and Raha, S and Nandy, SK and Narayan, R and Leupers, R (2019) A systematic approach for acceleration of matrix-vector operations in cgra through algorithm-architecture co-design. In: 32nd International Conference on VLSI Design, VLSID 2019, 5 January 2019 - 9 January 2019, New Delhi, pp. 64-69.
