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Kumar, P and Nair, AR and Chatterjee, O and Paul, T and Ghosh, A and Chakrabartty, S and Thakur, CS (2019) Neuromorphic In-Memory Computing Framework using Memtransistor Cross-bar based Support Vector Machines. In: 62nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2019, 4 - 7 August 2019, Dallas, pp. 311-314.
Gunasekaran, A and Jose, NC and Srinivasa Garani, S (2019) An Optimized BCH Decoder Design Architecture for Adaptive M-ary Recording Channels. In: 62nd IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2019, 4 - 7 August 2019, United States, pp. 710-713.
Nair, AB and Mondal, A and Garani, SS (2019) A Low-complexity Hardware AWGN Channel Emulator on FPGA using Central Limit Theorem. In: 61st IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2018, 5 - 8 August 2018, Windsor, pp. 428-431.
Chakraborty, S and Priyanka, P and Gupta, S and Afshar, S and Hamilton, T and Thakur, CS (2019) Neuromorphic object tracking architecture, based on compound eyes, and implementation on FPGA. In: 61st IEEE International Midwest Symposium on Circuits and Systems, 8 August 2018, MWSCAS 2018; Windsor; Canada; 5, pp. 668-671.
