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Babalad, S and Shevade, S and Thazhuthaveetil, MJ and Govindarajan, R (2024) Tile Size and Loop Order Selection using Machine Learning for Multi-/Many-Core Architectures. In: 38th ACM International Conference on Supercomputing, ICS 2024, 4 June 2024through 7 June 2024, Kyoto, Japan, pp. 388-399.
Ullas, A and Nasre, R and Govindarajan, R (2023) Reduce, Reuse, and Adapt: Accelerating Graph Processing on GPUs. In: 30th Annual IEEE International Conference on High Performance Computing, Data, and Analytics, HiPC 2023, 18 December 2023through 21 December 2023, Goa, pp. 335-346.
Prasad, A and Rajendra, S and Rajan, K and Govindarajan, R and Bondhugula, U (2022) Treebeard: An Optimizing Compiler for Decision Tree Based ML Inference. In: 55th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 2022, 1 October 2022 - 5 October 2022, Chicago, pp. 494-511.
Anantpur, Jayvant and Govindarajan, R (2017) Taming warp divergence. In: 2017 International Symposium on Code Generation and Optimization, CGO 2017, 4 - 8 February 2017, Austin, pp. 50-60.
Gulur, Nagendra and Govindarajan, R and Mehendale, Mahesh (2016) MicroRefresh: Minimizing Refresh Overhead in DRAM Caches. In: International Symposium on Memory Systems (MEMSYS), OCT 03-06, 2016, Washington, DC, pp. 350-361.
Nagaraj, Vaivaswatha and Govindarajan, R (2015) Approximating Flow-Sensitive Pointer Analysis Using Frequent Itemset Mining. In: Proceedings of the IEEE/ACM International Symposium on Code Generation and Optimization (CGO), FEB 07-11, 2015, San Francisco, CA, pp. 225-234.
Govindarajan, R and Gao, Guang R (2015) Author Rebuttal to Rocha et al. ``Comments on Minimizing Buffer Requirements under Rate-Optimal Schedule in Regular Dataflow Networks''. In: JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 81 (1). pp. 135-136.
Anantpur, Jayvant and Govindarajan, R (2015) PRO: Progress Aware GPU Warp Scheduling Algorithm. In: 29th IEEE International Parallel and Distributed Processing Symposium (IPDPS), MAY 25-29, 2015, Hyderabad, INDIA, pp. 979-988.
Anantpur, Jayvant and Govindarajan, R (2015) Taming Control Divergence in GPUs through Control Flow Linearization. In: 23rd International Conference on Compiler Construction (CC), APR 05-13, 2014, Grenoble, FRANCE, pp. 133-153.
Gulur, Nagendra and Mehendale, Mahesh and Manikantan, R and Govindarajan, R (2014) Bi-Modal DRAM Cache: Improving Hit Rate, Hit Latency and Bandwidth. In: 47th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), DEC 13-17, 2014, Cambridge, ENGLAND, pp. 38-50.
Kong, Martin and Pop, Antoniu and Pouchet, Louis-Noel and Govindarajan, R and Cohen, Albert and Sadayappan, P (2014) Compiler/Runtime Framework for Dynamic Dataflow Parallelization of Tiled Programs. In: ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 11 (4).
Gajjar, Mrugesh R and Sreenivas, TV and Govindarajan, R (2013) Fast Likelihood Computation in Speech Recognition using Matrices. In: JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 70 (2). pp. 219-234.
Pai, Sreepathi and Thazhuthaveetil, Matthew J and Govindarajan, R (2013) Improving GPGPU Concurrency with Elastic Kernels. In: Eighteenth international conference on Architectural support for programming languages and operating systems , 16-20 March 2013, Houston, Texas, USA, pp. 407-418.
Nagaraj, Vaivaswatha and Govindarajan, R (2013) Parallel Flow-Sensitive Pointer Analysis by Graph-Rewriting. In: 22nd International Conference on Parallel Architectures and Compilation Techniques (PACT), SEP 07-11, 2013, Edinburgh, SCOTLAND, pp. 19-28.
Anantpur, Jayvant and Govindarajan, R (2013) Runtime dependence computation and execution of loops on heterogeneous systems. In: 2013 IEEE/ACM International Symposium on Code Generation and Optimization (CGO), 23-27 Feb. 2013, Shenzhen, pp. 151-160.
Kumar, Rajesh TS and Govindarajan, R and Ravikumar, CP (2012) On-Chip Memory Architecture Exploration Framework for DSP Processor-Based Embedded System on Chip. In: ACM TRANSACTIONS ON EMBEDDED COMPUTING SYSTEMS, 11 (1).
Prabhakar, Raghu and Govindarajan , R and Thazhuthaveetil, Matthew J (2012) CUDA-for-clusters: a system for efficient execution of CUDA kernels on multi-core clusters. In: Proceedings of the 18th International Conference Euro-Par 2012, August 27-31, 2012, Rhodes Island, Greece.
Pai, Sreepathi and Govindarajan, R and Thazhuthaveetil , Matthew J (2012) Fast and efficient automatic memory management for GPUs using compiler-assisted runtime coherence scheme. In: PACT '12 Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques, 2012, New York, NY, USA.
Gulur, Nagendra Dwarakanath and Manikantan, R and Mehendale, Mahesh and Govindarajan, R (2012) Multiple sub-row buffers in DRAM: unlocking performance and energy improvement opportunities. In: ICS '12 Proceedings of the 26th ACM International Conference on Supercomputing, 2012, New York, NY, USA.
Manikantan, R and Rajan, Kaushik and Govindarajan, R (2012) Probabilistic Shared Cache Management (PriSM). In: 39th Annual International Symposium on Computer Architecture (ISCA), JUN 09-13, 2012 , Portland, OR, USA, pp. 428-439.
Prasad, Ashwin and Anantpur, Jayvant and Govindarajan, R (2011) Automatic compilation of MATLAB programs for synergistic execution on heterogeneous processors. In: Proceedings of the 32nd ACM SIGPLAN Conference on Programming Language Design and Implementation, June 4-8, 2011, San Jose, California, USA.
Manikantan, R and Govindarajan, R and Rajan, Kaushik (2011) Extended histories: improving regularity and performance in correlation prefetchers. In: HiPEAC '11 Proceedings of the 6th International Conference on High Performance and Embedded Architectures and Compilers, 2011, New York, NY, USA.
Gajjar, Mrugesh R and Sreenivas, TV and Govindarajan, R (2011) Fast acoustic likelihood computation using low-rank matrix approximation. In: 2011 IEEE Workshop on Signal Processing Systems, October 4-7, 2011, Beirut, Lebanon.
Nasre, Rupesh and Govindarajan, R (2011) Prioritizing constraint evaluation for efficient points-to analysis. In: CGO '11 Proceedings of the 9th Annual IEEE/ACM International Symposium on Code Generation and Optimization, 2011, IEEE Computer Society Washington, DC, USA.
Govindarajan, R and Yang, Hongbo and Amaral, JN and Zhang, Chihong and Gao, Guang R (2003) Minimum Register Instruction Sequencing to Reduce Register Spills in Out-of-Order Issue Superscalar Architectures. In: IEEE Transactions on Computers, 52 (1). pp. 4-20.
Govindarajan, R and Yang, H and Amaral, JN and Zhang, C and Gao, GR (2001) Minimum Register Instruction Sequence Problem: Revisiting Optimal Code Generation for DAGs. In: 15th International Parallel and Distributed Processing Symposium. IPDPS 2001, 23-27 April, San Francisco,California, pp. 1-8.
Govindarajan, R and Zhang, C and Gao, GR (2000) Minimum register instruction scheduling: a new approach for dynamic instruction issue processors. In: Languages and Compilers for Parallel Computing, 4-6 Aug. 1999, La Jolla, CA, USA, pp. 70-84.
Govindarajan, R and Suciu, F and Zuberek, WM (1997) Timed Petri Net Models of Multithreaded Multiprocessor Architectures. In: Seventh International Workshop on Petri Nets and Performance Models, 1997, 3-6 June, Saint Malo, 153 -162.
