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Lenka, Manas Kumar and Banerjee, Gaurab (2019) A Wideband Blocker-Tolerant Receiver With Frequency-Translational Resistive Feedback (vol 27, pg 993, 2019). In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 27 (5). p. 1238.

Lenka, Manas Kumar and Banerjee, Gaurab (2019) A Wideband Blocker-Tolerant Receiver With Frequency-Translational Resistive Feedback. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 27 (5). pp. 993-1006.

Raja, Immanuel and Khatri, Vishal and Zahir, Zaira and Banerjee, Gaurab (2017) A 0.1-2-GHz Quadrature Correction Loop for Digital Multiphase Clock Generation Circuits in 130-nm CMOS. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 25 (3). pp. 1044-1053.

Raja, Immanuel and Banerjee, Gaurab and Zeidan, Mohamad A and Abraham, Jacob A (2016) A 0.1-3.5-GHz Duty-Cycle Measurement and Correction Technique in 130-nm CMOS. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 24 (5). pp. 1975-1983.

Khatri, Vishal and Banerjee, Gaurab (2016) A 0.25-3.25-GHz Wideband CMOS-RF Spectrum Sensor for Narrowband Energy Detection. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 24 (9). pp. 2887-2898.

Rajanna, Viveka Konandur and Amrutur, Bharadwaj (2016) A Variation-Tolerant Replica-Based Reference-Generation Technique for Single-Ended Sensing in Wide Voltage-Range SRAMs. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 24 (5). pp. 1663-1674.

Gubbi, Sagar Venkatesh and Amrutur, Bharadwaj (2015) All Digital Energy Sensing for Minimum Energy Tracking. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, APR 2015, pp. 796-800.

Manikandan, RR and Kumar, Abhishek and Amrutur, Bharadwaj (2015) A Digital Frequency Multiplication Technique for Energy Efficient Transmitters. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, APR 2015, pp. 781-785.

Venkateshan, Sriram and Patel, Alap and Varghese, Kuruvilla (2015) Hybrid Working Set Algorithm for SVM Learning With a Kernel Coprocessor on FPGA. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 23 (10). pp. 2221-2232.

Vasudevamurthy, Rajath and Das, Pratap Kumar and Amrutur, Bharadwaj (2014) Time-Based All-Digital Technique for Analog Built-in Self-Test. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 22 (2). pp. 334-342.

Chaturvedi, Vikram and Anand, Tejasvi and Amrutur, Bharadwaj (2013) An 8-to-1 bit 1-MS/s SAR ADC With VGA and Integrated Data Compression for Neural Recording. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 21 (11). pp. 2034-2044.

Mehta, Nandish and Amrutur, Bharadwaj (2012) Dynamic Supply and Threshold Voltage Scaling for CMOS Digital Circuits Using In-Situ Power Monitor. In: IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 20 (5). pp. 892-901.