Nayak, B and Verma, R and Ray, P and Chakraborty, SK and Shrivastava, M and Sahoo, PK (2024) Robust Growth of Electronic Grade p-type Large Area 2D WSe2 and High-performance PMOS Transistor. In: UNSPECIFIED.
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Abstract
Direct growth of large area WSe2 (1 cm2) with controlled layer number has been demonstrated using a robust and cost-effective water-assisted chemical vapour deposition (CVD) method. Through Raman and PL spectroscopy along with transport measurements, we have evaluated the structural, optical and electrical characteristics of the as-grown WSe2 layers. We have addressed the persistent contact issue for 2D materials, achieving a distinct p-type nature, a vital advancement in the realm of PMOS for CMOS technology integration. Furthermore, device-to-device performance variations are also evaluated, contributing to standardizing the quality of the 2D semiconductors and optimizing growth parameters. © 2024 IEEE.
Item Type: | Conference Paper |
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Publication: | IEEE Electron Devices Technology and Manufacturing Conference: Strengthening the Globalization in Semiconductors, EDTM 2024 |
Publisher: | Institute of Electrical and Electronics Engineers Inc. |
Additional Information: | The copyright for this article belongs to Institute of Electrical and Electronics Engineers Inc. |
Keywords: | Cost effectiveness; Field effect transistors; Quality control; Selenium compounds; Transition metals, Chemical vapour deposition; Dichalcogenides; Direct growth; Electronic grade; Field-effect transistor; Layer number; P-type; Performance; Robust growth; Transition metal dichalcogenides, Chemical vapor deposition |
Department/Centre: | Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology) |
Date Deposited: | 03 Jun 2024 07:29 |
Last Modified: | 03 Jun 2024 07:29 |
URI: | https://eprints.iisc.ac.in/id/eprint/85130 |
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