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Static RAM cell for ternary logic

Nagaraj, K and Ramkumar, K (1984) Static RAM cell for ternary logic. In: Proceedings of the IEEE, 72 (2). pp. 227-228.

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A novel CMOS static RAM cell for ternary logic systems is described. This cell is based on the lambda diode. The operation of the cell has been simulated using the SPICE 2G program. The results of the simulation are given.

Item Type: Editorials/Short Communications
Publication: Proceedings of the IEEE
Publisher: IEEE
Additional Information: Copyright 1984 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Department/Centre: Division of Mechanical Sciences > Mechanical Engineering
Date Deposited: 15 Jan 2010 09:31
Last Modified: 19 Sep 2010 05:48
URI: http://eprints.iisc.ac.in/id/eprint/23983

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