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Rajore, Ritesh and Nandy, SK and Jamadagni, HS (2009) Architecture of Run-time Reconfigurable Channel Decoder. In: IEEE International Conference on Communications (ICC 2009), JUN 14-18, 2009, Dresden, pp. 2961-2966.
Rajore, Ritesh and Garga, Ganesh and Jamadagni, HS and Nandy, SK (2008) Reconfigurable Viterbi decoder on mesh connected multiprocessor architecture. In: 19th IEEE International Conference on Application-Specific Systems, Architectures and Processors, JUL 02-04, 2008, Leuven.