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Ajayan, KR and Bhat, Navakanta (2011) Device oriented statistical modeling method for process variability in 45nm analog CMOS technology. In: 16th International Workshop on Physics of Semiconductor Devices, December 19, 2011, Kanpur, India.

Ajayan, KR and Bhat, Navakanta (2010) Linear transconductor with flipped voltage follower in 130 nm CMOS. In: Analog Integrated Circuits and Signal Processing, 63 (2). pp. 321-327.