|
 | Up a level |
Gokulan, T and Muraleedharan, A and Varghese, K (2020) Design of a 32-bit, dual pipeline superscalar RISC-V processor on FPGA. In: Proceedings - Euromicro Conference on Digital System Design, DSD 2020, 26-28 August 2020, Kranj; Slovenia, pp. 340-343.
Kumar, K and Raghunath, KP and Muraleedharan, A and Gaggatur, JS and Banerjee, G (2019) A 75-µW 2.4 GHz wake-up receiver in 65-nm CMOS for neonatal healthcare application. In: 32nd International Conference on VLSI Design, VLSID 2019, 5 January 2019 - 9 January 2019, New Delhi, pp. 287-292.
Gaikwad, P and Mukhopadhyay, A and Muraleedharan, A and Mitra, M and Biswas, P (2023) DEVELOPING A COMPUTER VISION BASED SYSTEM FOR AUTONOMOUS TAXIING OF AIRCRAFT. In: Aviation, 27 (4). pp. 248-258.
