Finite State Machine Testing Based on Growth and Disappearance Faults

Srinivas, MK and Jacob, James and Agrawal, Vishwani D (1992) Finite State Machine Testing Based on Growth and Disappearance Faults. In: Twenty-Second International Symposium on Fault-Tolerant Computing, 1992. FTCS-22. Digest of Papers, 8-10 July, Boston,MA, 238 -245.

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Abstract

We present a novel approach to generate functional test sequences for synchronous sequential non-scan circuits. The method is applicable when the functional description of the circuit can be obtained in the cubical form or a Personality Matrix (PM). The faults are modeled as growth and disappearance faults in the cubical description of the irredundant combinational function of the finite state machine (FSM).Considering the combinational logic alone, test vectors for these faults are eficiently derived using a cubebased method developed for programmable logic arrays (PLAs). It is shown that these tests cover 100% of stuck type faults in any irredundant two-level implementation and in the multi-level implementations obtained through testability preserving transformations. To derive tests for the sequential circuit, we represent it as an iterative array of the combinational logic whose PM is modified according to the fault. We give new PM based algorithms to obtain state justification and fault propagation sequences. Thus, the cube based PLA algorithm is extended to obtain the entire test sequence. Experimental results on MCNC synthesis benchmark FSMs and some ISCAS89 sequential circuits show that our approach can eficiently obtain functional test sequences which give very high coverage of stuck faults in specific implementations. The method has the added attraction that the functional test sequences are implementation independent and they can be obtained even when details of specific implementation are unavailable or unknown.

Item Type:	Conference Paper
Publisher:	IEEE
Additional Information:	Copyright 1992 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE
Department/Centre:	Division of Electrical Sciences > Electrical Communication Engineering
Date Deposited:	25 Aug 2008
Last Modified:	19 Sep 2010 04:27
URI:	http://eprints.iisc.ac.in/id/eprint/7077

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