Yadav, Apurv Kumar and Gopakumar, K and Raj, Krishna R and Umanand, Loganathan and Matsuse, Kouki and Kubota, Hisao (2019) Instantaneous Balancing of Neutral-Point Voltages for Stacked DC-Link Capacitors of a Multilevel Inverter for Dual-Inverter-Fed Induction Motor Drives. In: IEEE TRANSACTIONS ON POWER ELECTRONICS, 34 (3). pp. 2505-2514.
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Abstract
This paper proposes a novel method for instantaneous balancing of neutral-point (NP) voltages with stacked multilevel inverters (MLIs) for variable-speed drives. The stacked MLI uses series-connected dc sources and NPs (connecting points of dc sources) to obtain the desired levels. The balancing of NP voltages are obtained by using a low-voltage-capacitor-fed cascaded H-bridge (CHB) per phase of a symmetrical six-phase induction machine (IM), which ensures zero current drawn from NPs (at any given instant). Since no current is drawn from NPs, the single dc-link operation with stacked capacitors is also possible. The scheme is suitable for applications, where low-voltage dc sources and batteries are stacked to form a dc link. A variable-speed operation is done using a seven-level inverter scheme for a symmetrical six-phase IM, which is formed by three dc-link stacked capacitors cascaded with two low-voltage-capacitor-fed CHBs per phase. Furthermore, the method is extended for an open-end IM to obtain a seven-level common-mode eliminated space vector structure using a single dc link. The generalization of this method for any stacked n-level inverter without NP voltage deviation is also presented in this paper. The experimental results and analysis are included to validate the proposed method.
Item Type: | Journal Article |
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Publication: | IEEE TRANSACTIONS ON POWER ELECTRONICS |
Publisher: | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
Additional Information: | Copyright of this article belongs to IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC |
Keywords: | Cascaded H-bridge (CHB); common-mode elimination; induction motor drive; multilevel converter; stacked inverter |
Department/Centre: | Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology) |
Date Deposited: | 23 Feb 2019 08:38 |
Last Modified: | 23 Feb 2019 08:38 |
URI: | http://eprints.iisc.ac.in/id/eprint/61806 |
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