Prasanth, V and Parekhji, Rubin and Amrutur, Bharadwaj (2015) Improved Methods for Accurate Safety Analysis of Real-life Systems. In: 24th IEEE Asian Test Symposium, NOV 22-25, 2015, Mumbai, INDIA, pp. 175-180.
![]() |
PDF
IEEE _ATS_175_2015.pdf - Published Version Restricted to Registered users only Download (249kB) | Request a copy |
Abstract
Integrated circuits are being used in different applications which are not always known at the time of specification and design creation. Safety standards specify that certain design processes be followed to guarantee safety of the applications in which these circuits are being used. As a result, the design phase is followed (often mandated) by an evaluation phase, wherein the safety worthiness of the circuit must be ascertained. In this paper, we perform a detailed study of such an evaluation as practised in the industry, understand the limitations, and propose techniques to improve the existing methodology. The improvements proposed are: (i) Capturing workload diversity as input constraints (values and sequence). (ii) Modelling application specific performance tolerance. (iii) Illustrating how physical system can be included into this analysis using a suitable representation. (iv) Budgeting of tolerance across various interacting modules to reduce computational complexity of safety analysis. Experimental results to illustrate suitability of the proposed methods are presented using a set of ITC benchmark circuits and two representative industrial circuits.
Item Type: | Conference Paper |
---|---|
Series.: | Asian Test Symposium Proceedings |
Additional Information: | Copy right for this article belongs to the IEEE COMPUTER SOC, 10662 LOS VAQUEROS CIRCLE, PO BOX 3014, LOS ALAMITOS, CA 90720-1264 USA |
Department/Centre: | Division of Electrical Sciences > Electrical Communication Engineering |
Date Deposited: | 07 Dec 2016 04:35 |
Last Modified: | 07 Dec 2016 04:35 |
URI: | http://eprints.iisc.ac.in/id/eprint/55449 |
Actions (login required)
![]() |
View Item |