On Bit Steering in the Minimization of the Control Memory of Microprogrammed Processors

Biswas, NN (1985) On Bit Steering in the Minimization of the Control Memory of Microprogrammed Processors. In: IEEE Transactions on Computers, 34 (11). 1057 -1061.

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Abstract

The microcommands constituting the microprogram of the control memory of a microprogrammed processor can be partitioned into a number of disjoint sets. Some of these sets are then encoded to minimize the word width of the ROM storing the microprogram. A further reduction in the width of the ROM words can be achieved by a technique known as bit steering where one or more bits are shared by two or more sets of microcommands. These sets are called the steerable sets. This correspondence presents a simple method for the detection and encoding of steerable sets. It has been shown that the concurrency matrix of two steerable sets exhibits definite patterns of clusters which can be easily recognized. A relation "connection" has been defined which helps in the detection of three-set steerability. Once steerable sets are identified, their encoding becomes a straightforward procedure following the location of the identifying clusters on the concurrency matrix or matrices.

Item Type:	Journal Article
Publication:	IEEE Transactions on Computers
Publisher:	IEEE Transactions on Computers
Additional Information:	Copyright 1985 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE.
Department/Centre:	Division of Electrical Sciences > Electrical Communication Engineering
Date Deposited:	13 Jan 2010 08:00
Last Modified:	19 Sep 2010 05:44
URI:	http://eprints.iisc.ac.in/id/eprint/22970

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