Maitra, Kingsuk and Bhat, Navakanta (2003) Analytical approach to integrate the different components of direct tunneling current through ultrathin gate oxides in n-channel metal–oxide–semiconductor field-effect transistors. In: Journal of Applied Physics, 93 (2). pp. 1064-8.
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Abstract
An analytical scheme to combine the channel component and the edge component of direct tunneling current through ultrathin gate oxides in n-channel metal–oxide–semiconductor field-effect transistors has been developed. The results obtained have been calibrated against the published experimental and numerical simulation data. The inherent simplicity of the proposed analytical model makes it suitable for implementing in circuit simulators. The proposed model is capable of predicting the tunneling current under positive as well as negative gate bias. The impact of gate-source/drain extension overlap length (edge) on total gate leakage is clearly quantified. It is demonstrated that the overlap length should be scaled to decrease the leakage power consumption and also to extend the scalability of gate oxide to lower values.
Item Type: | Journal Article |
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Publication: | Journal of Applied Physics |
Publisher: | American Institute of Physics (AIP) |
Additional Information: | Copyright for this article belongs to American Institute of Physics (AIP) |
Department/Centre: | Division of Electrical Sciences > Electrical Communication Engineering |
Date Deposited: | 09 Jun 2004 |
Last Modified: | 19 Sep 2010 04:12 |
URI: | http://eprints.iisc.ac.in/id/eprint/202 |
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