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Prasanth, V and Parekhji, Rubin and Amrutur, Bharadwaj (2017) Safety Analysis for Integrated Circuits in the Context of Hybrid Systems. In: IEEE International Test Conference (ITC), OCT 31-NOV 02, 2017, Fort Worth, TX.
Prasanth, V and Singh, Virendra and Parekhji, Rubin (2012) Derating Based Hardware Optimizations in Soft Error Tolerant Designs. In: 30th IEEE VLSI Test Symposium (VTS), APR 23-25, 2012, Hawaii, USA, pp. 282-287.
Prasanth, V and Parekhji, Rubin and Amrutur, Bharadwaj (2015) Improved Methods for Accurate Safety Analysis of Real-life Systems. In: 24th IEEE Asian Test Symposium, NOV 22-25, 2015, Mumbai, INDIA, pp. 175-180.
Surendran, Sudhakar and Parekhji, Rubin and Govindarajan, R (2008) A Systematic Approach to Synthesis of Verification Test-suites for Modular SoC Designs. In: In Proc. of the 21st Annual IEEE SoC Conference, (SoCC-08), Newport Beach, CA, USA, 17-20 Sept. 2008 , Newport Beach, CA .
