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Mahapatra, Ipsita Biswas and Nandy, SK (2018) An Algorithm - Architecture Co-Designed System for Dynamic Execution-Driven Pre-Silicon Verification. In: 2018 IEEE International Reliability Physics Symposium, IRPS 2018; Burlingame; United States; 11 March, 11-15 March 2018, Burlingame, CA, USA, pp. 85-89.
Mahapatra, Ipsita Biswas and Agarwal, Utkarsh and Nandy, SK (2018) DFG partitioning algorithms for coarse grained reconfigurable array assisted RTL simulation accelerators. In: IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT), MAR 16-17, 2018, Bangalore, INDIA. (In Press)
Mahapatra, Ipsita Biswas and Natarajan, Santhi and Nalesh, S and Nandy, SK (2015) SIMAAH: RTL simulation accelerator for complex SoC's. In: IEEE International Conference on Electronics Computing and Communication Technologies (CONECCT), JUL 10-11, 2015, JUL 10-11, 2015.