Up a level |
Das, Bishnu Prasad and Janakiraman, V and Amrutur, Bharadwaj and Jamadagni, HS and Arvind, NV (2008) Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations. In: IEEE International Conference on VLSI Design, Hyderabad, India, 4-8 Jan. 2008, Hyderabad .
Das, Bishnu Prasad and Janakiraman, V and Amrutur, Bharadwaj and Jamadagni, HS and Arvind, NV (2008) Voltage and Temperature Scalable Gate Delay and Slew Models Including Intra-Gate Variations. In: IEEE VLSI Design Conference, Hyderabad, India, Jan 2008, 4-8 Jan. 2008 , Hyderabad.
Janakiraman, V and Bharadwaj, Amrutur and Visvanathan, V (2010) Voltage and Temperature Aware Statistical Leakage Analysis Framework Using Artificial Neural Networks. In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 29 (7). pp. 1056-1069.