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Das, Saptarsi and Sivanandan, Nalesh and Madhu, Kavitha T and Nandy, Soumitra K and Narayan, Ranjani (2016) RHyMe: REDEFINE HyperCell Multicore for Accelerating HPC Kernels. In: 29th International Conference on VLSI DESIGN / 15th International Conference on Embedded Systems (VLSID), JAN 04-08, 2016, Kolkata, INDIA, pp. 601-602.
Madhu, Kavitha T and Das, Saptarsi and Nalesh, S and Nandy, SK and Narayan, Ranjani (2015) Compiling HPC Kernels for the REDEFINE CGRA. In: 2015 IEEE 17th International Conference on High Performance Computing and Communications (HPCC), AUG 24-26, 2016, Int Symposium Cyberspace Safety & Secur, New York, NY, pp. 405-410.
Nalesh, S and Madhu, Kavitha T and Das, Saptarsi and Nandy, SK and Narayan, Ranjani (2015) Energy Aware Synthesis of Application Kernels expressed in Functional Languages on a Coarse Grained Composable Reconfigurable Array. In: IEEE International Symposium on Nanoelectronic and Information Systems, DEC 21-23, 2015, Indore, INDIA, pp. 7-12.
Madhu, Kavitha T and Das, Saptarsi and Krishna, Madhava C and Nalesh, S and Nandy, SK and Narayan, Ranjani (2014) Synthesis of Instruction Extensions on HyperCell, a Reconfigurable Datapath. In: International Conference on Embedded Computer Systems - Architectures, Modeling, and Simulation (SAMOS), JUL 14-17, 2014, Samos, GREECE, pp. 215-224.
Das, Saptarsi and Narayan, Ranjani and Narayan, Soumitra Kumar (2012) Accelerating Reduction for Enabling Fast Multiplication over Large Binary Fields. In: 8th International Joint Conference on e-Business and Telecommunications, JUL 18-21, 2011, Seville, SPAIN , pp. 249-263.
Das, Saptarsi and Varadarajan, Keshavan and Garga, Ganesh and Mondal, Rajdeep and Narayan, Ranjani and Nandy, SK (2011) A method for flexible reduction over binary fields using a field multiplier. In: SECRYPT 2011 - Proceedings of the International Conference on Security and Cryptography, 18-21 July, Seville, Spain.
Fell, Alexander and Alle, Mythri and Varadarajan, Keshavan and Biswas, Prasenjit and Das, Saptarsi and Chetia, Jugantor and Nandy, SK and Narayan, Ranjani (2009) Streaming FFT on REDEFINE-v2: An Application-Architecture Design Space Exploration. In: proceedings of the 2009 International Conference on Compilers,Architecture and Synthesis for Embedded Systems (CASES 2009),, Grenoble,Frane.
Nalesh, S and Madhu, Kavitha T and Das, Saptarsi and Nandy, S K and Narayan, Ranjani (2017) Energy aware synthesis of application kernels through composition of data-paths on a CGRA. In: INTEGRATION-THE VLSI JOURNAL, 58 . pp. 320-328.
Das, Saptarsi and Madhu, Kavitha and Krishna, Madhav and Sivanandan, Nalesh and Merchant, Farhad and Natarajan, Santhi and Biswas, Ipsita and Pulli, Adithya and Nandy, SK and Narayan, Ranjani (2014) A framework for post-silicon realization of arbitrary instruction extensions on reconfigurable data-paths. In: JOURNAL OF SYSTEMS ARCHITECTURE, 60 (7). pp. 592-614.
Garga, Ganesh and Das, Saptarsi and Nandy, SK and Narayan, Ranjani and Haldar, Chandan and Jagtap, Maheshkumar P and Dash, Siba Prasad (2012) A Flexible Crypto-system Based upon the REDEFINE Polymorphic ASIC Architecture. In: Defence Science Journal, 62 (1). pp. 25-31.
Alle, Mythri and Varadarajan, Keshavan and Fell, Alexander and Reddy, Ramesh C and Joseph, Nimmy and Das, Saptarsi and Biswas, Prasenjit and Chetia, Jugantor and Rao, Adarsh and Nandy, SK and Narayan, Ranjani (2009) Redefine: Runtime Reconfigurable Polymorphic ASIC. In: ACM Transactions in Embedded Computing Systems (TECS), 9 (2).
