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Biswas, Prasenjit and Alle, Mythri and Nandy, SK and Narayan, R and Varadarajan, Keshavan (2010) Design space exploration of systolic realization of QR factorization on a runtime reconfigurable platform. In: 2010 International Conference on Embedded Computer Systems (SAMOS), 19-22 July 2010, Samos.
Biswas, P and Narayan, R and Nandy, SK and Alle, Mythri and Varadarajan, K and Mondal, R and Udupa, PP (2010) Accelerating Numerical Linear Algebra Kernels on a Scalable Run Time Reconfigurable Platform. In: 2010 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 5-7 July 2010, Lixouri, Kefalonia.
Alle, Mythri and Varadarajan, Keshavan and Fell, Alexander and Nandy, SK (2009) Compiling Techniques for Coarse Grained Runtime Reconfigurable Architectures. In: 5th International Workshop on Applied Reconfigurable Computing, Mar 16-18, 2009, Karlsruhe, Germany.
Rao, Adarsha and Alle, Mythri and Sainath, V and Shaik, Reyaz and Chowhan, Rajashekhar and Sankaraiah, S and Mantha, Sravanthi and Nandy, SK and Narayan, Ranjani (2009) An Input Triggered Polymorphic ASIC for H.264 Decoding. In: 20th IEEE International Conference on Application-Specific Systems, Architectures and Processors, JUL 07-09, 2009, Boston, MA, USA, pp. 106-113.
Fell, Alexander and Alle, Mythri and Varadarajan, Keshavan and Biswas, Prasenjit and Das, Saptarsi and Chetia, Jugantor and Nandy, SK and Narayan, Ranjani (2009) Streaming FFT on REDEFINE-v2: An Application-Architecture Design Space Exploration. In: proceedings of the 2009 International Conference on Compilers,Architecture and Synthesis for Embedded Systems (CASES 2009),, Grenoble,Frane.
Garga, Ganesh and Alle, Mythri and Varadarajan, Keshavan and Nandy, SK and Jamadagni, HS (2008) Realizing a flexible constraint length Viterbi decoder for software radio on a de Bruijn interconnection network. In: 10th International Symposium on System-on-chip, Nov 4-6, 2008, held in Tampere, Finland, 5-6 Nov. 2008 , Tampere.
Satrawala, AN and Varadarajan, Keshavan and Alle, Mythri and Nandy, SK and Narayan, Ranjani (2007) REDEFINE: Architecture of a SoC Fabric for Runtime Composition of Computation Structures. In: Proceedings of the International Conference on Field Programmable Logic and Applications, FPL 2007, Amsterdam, Aug 2007., 27-29 Aug. 2007 , Amsterdam .
Alle, Mythri and Biswas, J and Nandy, SK (2007) High performance VLSI implementation for H.264 Inter/Intra prediction. In: International Conference on Consumer Electronics:ICCE 2007, Digest of Technical Papers, 10-14 January 2007, Las Vegas, NV, pp. 1-2.
Alle, Mythri and Biswas, J and Nandy, SK (2006) High performance VLSI architecture design for H.264 CAVLC decoder. In: 17th IEEE International Conference on Application-Specific Systems ArchiteSteamboat Springs,, Sep 11-13, 2006, Steamboat Springs, CO, pp. 317-322.
Alle, Mythri and Nandy, SK and Biswas, J (2006) Speed and Area Optimized Implementation of H.264 8X8 DCT Transform and Quantizer. In: In Proceedings of Distributed Multimedia Systems 2006, August 30-September 1, Grand Canyon, USA.
Alle, Mythri and Varadarajan, Keshavan and Fell, Alexander and Reddy, Ramesh C and Joseph, Nimmy and Das, Saptarsi and Biswas, Prasenjit and Chetia, Jugantor and Rao, Adarsh and Nandy, SK and Narayan, Ranjani (2009) Redefine: Runtime Reconfigurable Polymorphic ASIC. In: ACM Transactions in Embedded Computing Systems (TECS), 9 (2).
