Electrical Conduction in 10nm Thin Polysilicon Wires from 4 to 400K and Their Operation for Hybrid Memory

Ecoffey, Serge and Bouvet, Didier and Mahapatra, Santanu and Reimbold, Gilles and Ionescu, Adrian Mihai (2006) Electrical Conduction in 10nm Thin Polysilicon Wires from 4 to 400K and Their Operation for Hybrid Memory. In: Japanese Journal of Applied Physics-Part 1, 45 (6B). pp. 5461-5466.

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Abstract

This paper reports on the experimental investigation of conduction mechanisms in gated ultra-thin polysilicon nanowires (polySiNW) over a wide range of temperature: from 4 to 400 K. Some irregular Coulomb oscillations (CO) are observed at temperatures lower than 200K showing several periods due to the random mixture of grain sizes (5 – 20 nm). We report increased oscillations at intermediate range of temperatures (between 50 and 150 K) and at high drain voltages in polySiNW with a mixture of grain sizes. Monte Carlo (MC) simulations performed on an array of conductive islands connected to each other by tunnel junctions (modeling the nanograin polysilicon) validate the experimental observations and a first order theory is proposed. Finally, the V-shape (ambipolar) drain current versus gate voltage $(I_{DS}-V_{GS})$ characteristic and related hysteresis of the polySiNW is exploited for building a novel hybrid polySiNW-NMOS memory circuit cell.

Item Type:	Journal Article
Publication:	Japanese Journal of Applied Physics-Part 1
Publisher:	The Japan Society of Applied Physics
Additional Information:	Copyright of this article belongs to the Japan Society of Applied Physics.
Keywords:	Polysilicon;Nanograins;Low temperature;High temperature;Coulomb oscillations;Hybrid memory;Monte Carlo simulations
Department/Centre:	Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited:	27 Jun 2007
Last Modified:	19 Sep 2010 04:32
URI:	http://eprints.iisc.ac.in/id/eprint/8895

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