Rao, DP and Godkhindi, SS and Kumar, AV and Prabhakar, TV (2024) Dy-MAC: Implementation of dynamic MAC stack for IEEE 802.15.4e-TSCH. In: Ad Hoc Networks, 152 .
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Abstract
This paper presents the lessons learnt in the implementation of IEEE 802.15.4e-Time Slotted Channel Hopping (TSCH) Medium Access Control (MAC) protocol on commercially available hardware. Our MAC Application programming Interface (API) called the Dy-MAC is agnostic to the PHY layer and is coded on a ARM cortex M4. MAC functions such as TDMA, FDMA, frame counter, channel access, synchronization and PAN formation are abstracted as part of this API. Dy-MAC is demonstrated for 2.4GHz with O-QPSK modulation and 868MHz with SUN FSK modulation. Furthermore, the API supports star, mesh and tree network to provide flexible topologies in factory environment. Our experiments show that for a 76 byte payload, the TSCH Dy-MAC provides ∼ 99% packet delivery ratio (PDR) for 26ms timeslot with SUN FSK PHY and ∼ 97% PDR for 10ms timeslot with O-QPSK PHY. To maintain synchronization over the entire network, we implemented algorithms to successfully communicate between fast and slow nodes. Resilience to interference and range with packet delivery ratio is evaluated. We consolidate our implementation in terms of 10 lessons that were learnt in building the Dy-MAC protocol. © 2023 Elsevier B.V.
Item Type: | Editorials/Short Communications |
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Publication: | Ad Hoc Networks |
Publisher: | Elsevier B.V. |
Additional Information: | The copyright for this article belongs to the Elsevier B.V. |
Keywords: | Application programming interfaces (API); Frequency division multiple access; Frequency hopping; IEEE Standards; Quadrature phase shift keying; Synchronization; Time division multiple access, Applications programming interfaces; Channel hopping; Finite state machine; Finite states machine; IEEE 802.15.4e; IIoT; Information element; Information elements; Node re-joining; Slotted channels; SPI; Time slotted channel hopping; Time synchronization, Medium access control |
Department/Centre: | Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology) |
Date Deposited: | 01 Dec 2023 03:14 |
Last Modified: | 01 Dec 2023 03:14 |
URI: | https://eprints.iisc.ac.in/id/eprint/83330 |
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