Low-Depth Arithmetic Circuit Lower Bounds: Bypassing Set-Multilinearization

Amireddy, P and Garg, A and Kayal, N and Saha, C and Thankey, B (2023) Low-Depth Arithmetic Circuit Lower Bounds: Bypassing Set-Multilinearization. In: 50th International Colloquium on Automata, Languages, and Programming, ICALP 2023, 10 - 14 July 2023, Paderborn.

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Abstract

A recent breakthrough work of Limaye, Srinivasan and Tavenas [29] proved superpolynomial lower bounds for low-depth arithmetic circuits via a “hardness escalation” approach: they proved lower bounds for low-depth set-multilinear circuits and then lifted the bounds to low-depth general circuits. In this work, we prove superpolynomial lower bounds for low-depth circuits by bypassing the hardness escalation, i.e., the set-multilinearization, step. As set-multilinearization comes with an exponential blow-up in circuit size, our direct proof opens up the possibility of proving an exponential lower bound for low-depth homogeneous circuits by evading a crucial bottleneck. Our bounds hold for the iterated matrix multiplication and the Nisan-Wigderson design polynomials. We also define a subclass of unrestricted depth homogeneous formulas which we call unique parse tree (UPT) formulas, and prove superpolynomial lower bounds for these. This significantly generalizes the superpolynomial lower bounds for regular formulas [6,19].

Item Type:	Conference Paper
Publication:	Leibniz International Proceedings in Informatics, LIPIcs
Publisher:	Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing
Additional Information:	The copyright for this article belongs to the Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing.
Keywords:	arithmetic circuits; low-depth circuits; lower bounds; shifted partials.
Department/Centre:	Division of Electrical Sciences > Computer Science & Automation
Date Deposited:	29 Nov 2023 09:35
Last Modified:	29 Nov 2023 09:35
URI:	https://eprints.iisc.ac.in/id/eprint/82912

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