Circuit Reliability of MoS_2 Channel Based 2D Transistors

Rai, AK and Variar, HB and Shrivastava, M (2023) Circuit Reliability of MoS_2 Channel Based 2D Transistors. In: 61st IEEE International Reliability Physics Symposium, IRPS 2023, 26-30 March 2023, Monterey.

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Abstract

Inverters being the basic logic element of the circuits used, we have demonstrated MoS₂ -based inverter degradation in terms of various parameters (inverter high output (VOH), inverter low output (VOL), rise time (tr), gain) under critical stress conditions. These stress conditions include multiple voltage transfer characteristics (VTC) sweeps, application of 104 pulses at the input of inverter (VIN), change of output dynamic response with continuous pulses, and long duration DC stress for logic 0 and 1 at VIN. The percentage degradation in inverter characteristics was found to be increasing with an increase in supply voltage (VDD) for all the stress cases. Among various stress cases run, VOL increased by 120 mV, VOH decreased by 150 mV, gain decreased by 500 mV/V, and tr increased by 4 μs. The degradation in inverter key parameters was found to be originated from the deterioration in the performance of the individual driver and load transistors.

Item Type:	Conference Paper
Publication:	IEEE International Reliability Physics Symposium Proceedings
Publisher:	Institute of Electrical and Electronics Engineers Inc.
Additional Information:	The copyright for this article belongs to the Institute of Electrical and Electronics Engineers Inc.
Keywords:	Circuit; Inverter; Reliability; Transistor
Department/Centre:	Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited:	07 Jul 2023 10:32
Last Modified:	07 Jul 2023 10:32
URI:	https://eprints.iisc.ac.in/id/eprint/82110

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