Kumar, V (2021) Deep Neural Network Approach to Estimate Early Worst-Case Execution Time. In: IEEE Digital Avionics Systems Conference - Proceedings, 3 - 7 October 2021, San Antonio.
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Abstract
Estimating Worst-Case Execution Time (WCET) is of utmost importance for developing Cyber-Physical and Safety-Critical Systems. The system's scheduler uses the estimated WCET to schedule each task of these systems, and failure may lead to catastrophic events. It is thus imperative to build provably reliable systems. WCET is available to us in the last stage of systems development when the hardware is available and the application code is compiled on it. Different methodologies measure the WCET, but none of them give early insights on WCET, which is crucial for system development. If the system designers overestimate WCET in the early stage, then it would lead to the overqualified system, which will increase the cost of the final product, and if they underestimate WCET in the early-stage, then it would lead to financial loss as the system would not perform as expected.This paper estimates early WCET using Deep Neural Networks as an approximate predictor model for hardware architecture and compiler. This model predicts the WCET based on the source code without compiling and running on the hardware architecture. Our WCET prediction model is created using the Pytorch framework. The resulting WCET is too erroneous to be used as an upper bound on the WCET. However, getting these results in the early stages of system development is an essential prerequisite for the system's dimensioning and configuration of the hardware setup.
| Item Type: | Conference Paper |
|---|---|
| Publication: | AIAA/IEEE Digital Avionics Systems Conference - Proceedings |
| Publisher: | Institute of Electrical and Electronics Engineers Inc. |
| Additional Information: | The copyright for this article belongs to the Authors. |
| Keywords: | Deep neural networks; Embedded systems; Interactive computer systems; Losses; Network architecture; Program compilers; Safety engineering, Catastrophic event; Cyber physicals; Cyber-safety; Embedded-system; Hardware architecture; Real - Time system; Reliable systems; Safety critical systems; System development; Worst-case execution time, Real time systems |
| Department/Centre: | Division of Interdisciplinary Sciences > Computational and Data Sciences |
| Date Deposited: | 06 Jun 2023 10:02 |
| Last Modified: | 06 Jun 2023 10:02 |
| URI: | https://eprints.iisc.ac.in/id/eprint/81809 |
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