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Design of Dual-Material Gate Junctionless FinFET based on the Properties of Materials Forming Gate Electrode

Mathew, S and Bhat, KN and Nithin, N and Rao, R (2023) Design of Dual-Material Gate Junctionless FinFET based on the Properties of Materials Forming Gate Electrode. In: IETE Journal of Research .

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Official URL: https://doi.org/10.1080/03772063.2023.2194264

Abstract

This work elaborately investigates the electrical behaviour and short channel performance of Dual-Material Gate Junctionless Fin Field Effect Transistors (DMG-JLFinFETs) with multiple-gate metal pairs and varying gate metal length ratios. Rigorous analysis on the nature of DMG-JLFinFET with gate length as low as 10 nm is done using a device simulator by Silvaco, Inc. The gate material closer to the source, namely M1, has a dominating influence on the threshold voltage (V th) and tunnelling current (I tunn) than the gate material closer to the drain (named M2) in a DMG-JLFinFET. I tunn is lower when the work function of M1 (Φ M1) is greater than the work function of M2 (Φ M2). The relative change in threshold voltage is minimum for Platinum–Gold (PtAu)-DMG-JLFinFET (0.68%). Titanium–Aluminium (TiAl) and Nickel–Titanium (NiTi) gate material pairs, having the same work function difference of 0.38 eV, have the least Drain-Induced Barrier Lowering (DIBL) of 12.88 mV/V. A better Sub-threshold Swing (SS) is observed for DMG-JLFinFET having Φ M1 < Φ M2. For devices with Φ M1 > Φ M2, SS can be improved by making a length of M1 (L M1) greater than 70% of the total gate length (L g).

Item Type: Journal Article
Publication: IETE Journal of Research
Publisher: Taylor and Francis Ltd.
Additional Information: The copyright for this article belongs to Taylor and Francis Ltd.
Keywords: Binary alloys; Computer circuits; Drain current; FinFET; Refractory metal compounds; Titanium; Titanium alloys; Titanium nitride; Work function, Drain-induced barrier lowering; Dual-material gates; Fin field-effect transistors; Gate materials; Gate metals; Gate-length; Junctionless FinFET; Property; Sub-threshold swing; Subthreshold, Threshold voltage
Department/Centre: Division of Interdisciplinary Sciences > Centre for Nano Science and Engineering
Date Deposited: 19 May 2023 07:19
Last Modified: 19 May 2023 07:19
URI: https://eprints.iisc.ac.in/id/eprint/81581

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