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Open-Source Heterogeneous Constrained Edge-Computing Platform for Smart Grid Measurements

Joglekar, A and Gurrala, G and Kumar, P and Joseph, FC and Kiran, TS and Sahasranand, KR and Tyagi, H (2021) Open-Source Heterogeneous Constrained Edge-Computing Platform for Smart Grid Measurements. In: IEEE Transactions on Instrumentation and Measurement, 70 .

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Official URL: https://doi.org/10.1109/TIM.2021.3078557


This article presents a low-cost, open-source, heterogeneous, resource-constrained hardware platform called 'Parallella' as a measurement device for edge-computing applications research in smart grid. The unique hardware architecture of the Parallella provides a multitude of edge-computing resources in the form of a Zynq SoC (dual-core ARM + FPGA) and a 16-core co-processor called Epiphany. A multifunctional intelligent electronic device (IED) design is demonstrated to showcase the capabilities of the platform. A custom I/O board has been developed for the desktop and embedded versions of Parallella, which can be interfaced with external daughter boards and peripherals for measurements. One such daughter board is an analog sensing board, which can measure voltages of all the three phases and four line currents using a 16-bit synchronous ADC set at 32 kHz. The ADC samples are synchronized to the PPS time clock of a GPS unit for providing global time reference. These captured seven-channel raw waveform data are sent to a cloud server over a bandwidth-limited communication channel using a custom anomaly-aware data compression algorithm implemented on the ARM. A phasor measurement algorithm using the Teager energy operator (TEO) is implemented on the field-programmable gate array (FPGA). A parallel power quality (PQ) measurement algorithm is implemented on the Epiphany. The obtained measurements are found to be comparable to a commercial power analyzer.

Item Type: Journal Article
Publication: IEEE Transactions on Instrumentation and Measurement
Publisher: Institute of Electrical and Electronics Engineers Inc.
Additional Information: The copyright for this article belongs to Institute of Electrical and Electronics Engineers Inc.
Keywords: ARM processors; Bandwidth compression; Computer hardware; Edge computing; Electric power transmission networks; Field programmable gate arrays (FPGA); Smart power grids; System-on-chip, Computing applications; Computing platform; Data compression algorithms; Global time reference; Hardware architecture; Measurement algorithms; Measurement device; Teager energy operators, Open systems
Department/Centre: Division of Electrical Sciences > Electrical Communication Engineering > Electrical Communication Engineering - Technical Reports
Date Deposited: 18 Apr 2023 06:58
Last Modified: 18 Apr 2023 06:58
URI: https://eprints.iisc.ac.in/id/eprint/80639

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