Ansh, A and Patbhaje, U and Kumar, J and Meersha, A and Shrivastava, M (2023) Origin of electrically induced defects in monolayer MoS2 grown by chemical vapor deposition. In: Communications Materials, 4 (1).
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Abstract
Defects in MoS2 play substantial role in determining the performance of MoS2-based field-effect transistors. Typically, growth/synthesis process conditions determine the type and concentration of defects. Here, we show that defects are also introduced by prolonged operation of single crystal chemical vapor deposition-grown monolayer MoS2 transistors which hinder the overall performance. Depending on the electrical stress conditions, these defects result in threshold voltage instabilities, enhanced channel conductance, improved screening of charged impurity scattering sites and possibly better thermal management in MoS2 transistors. It turns out that a piezoelectric response in MoS2 leads to permanent change in the material’s molecular configuration thereby causing other effects like suppressed hopping transport within the channel, increased free electron concentration, prominent metal-insulator transition and reduction in channel potential with or without increasing sulfur vacancy concentration. As these defects are progressively introduced in the channel, the thermal dissipation capability of our MoS2 transistors improved due to enhanced channel-dielectric coupling. Such variations in the device performance due to spontaneous response to high electric field trigger a need to reconsider supply voltage requirements of MoS2-based electronic circuits for low-power logic applications. © 2023, The Author(s).
Item Type: | Journal Article |
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Publication: | Communications Materials |
Publisher: | Springer Nature |
Additional Information: | The copyright for this article belongs to the Authors. |
Keywords: | Crystal impurities; Defects; Electric fields; Electrons; Field effect transistors; Layered semiconductors; Low power electronics; Metal insulator boundaries; Metal insulator transition; Molybdenum compounds; Monolayers; Semiconductor insulator boundaries; Sulfur compounds; Threshold voltage, Channel conductance; Chemical vapour deposition; Electrical stress; Field-effect transistor; Induced defects; Performance; Process condition; Stress condition; Synthesis process; Threshold-voltage instabilities, Single crystals |
Department/Centre: | Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology) |
Date Deposited: | 21 Feb 2023 03:15 |
Last Modified: | 21 Feb 2023 03:15 |
URI: | https://eprints.iisc.ac.in/id/eprint/80536 |
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