A Fault-Tolerant Five-Level Inverter Topology with Reduced Component Count for OEIM Drives

Ghosh Majumder, M and Rakesh, R and Gopakumar, K and Umanand, L and Al-Haddad, K and Jarzyna, W (2021) A Fault-Tolerant Five-Level Inverter Topology with Reduced Component Count for OEIM Drives. In: IEEE Journal of Emerging and Selected Topics in Power Electronics, 9 (1). pp. 961-969.

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Abstract

This article proposes a fault-tolerant five-level inverter scheme for open-end induction motor (OEIM) drive application using a single dc link. The drive is fed with a primary inverter (a two-level inverter cascaded with a capacitor-fed H-bridge inverter) from one end and a secondary inverter (capacitor-fed two-level inverter) from the other end. The ratio of the dc-link voltage to the nominal capacitor voltage in the H-bridge and the secondary two-level inverter is maintained at 4:2:1. The capacitor balancing in the proposed scheme is achieved by space-vector (SV) redundancy. The proposed scheme gives five-level inverter operation with less number of components compared with other existing inverter topologies. Furthermore, the scheme provides fault-tolerant capability against a failure of the power switches in the H-bridges and the secondary two-level inverter. The experimental results in steady and transient states are presented. Also, the inverter operation during fault is provided to validate the effectiveness of the proposed scheme. © 2013 IEEE.

Item Type:	Journal Article
Publication:	IEEE Journal of Emerging and Selected Topics in Power Electronics
Publisher:	Institute of Electrical and Electronics Engineers Inc.
Additional Information:	The copyright for this article belongs to Institute of Electrical and Electronics Engineers Inc.
Keywords:	Balancing; Bridge circuits; Fault tolerance; Induction motors; Topology; Vector spaces, Fault-tolerant capability; Five level inverter; H-bridge inverters; Inverter operations; Inverter topologies; Number of components; Steady and transient state; Two-level inverters, Electric inverters
Department/Centre:	Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited:	20 Feb 2023 06:22
Last Modified:	20 Feb 2023 06:22
URI:	https://eprints.iisc.ac.in/id/eprint/80384

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