ePrints@IIScePrints@IISc Home | About | Browse | Latest Additions | Advanced Search | Contact | Help

Insights into the system-level IEC ESD failure in high voltage DeNMOS-SCR for automotive applications

Kranthi, NK and Di Sarro, J and Sankaralingam, R and Boselli, G and Shrivastava, M (2020) Insights into the system-level IEC ESD failure in high voltage DeNMOS-SCR for automotive applications. In: Electrical Overstress/Electrostatic Discharge Symposium Proceedings, 13 - 18 September, Reno.

[img] PDF
EOS-ESD_2020.pdf - Published Version
Restricted to Registered users only

Download (5MB) | Request a copy
Official URL: https://ieeexplore.ieee.org/document/9241339

Abstract

- A unique failure mechanism for IEC stress through a common-mode choke is investigated. Minor variations in the stress current waveform shape for specific IEC stress levels are found to cause an unexpected window failure. 3D TCAD simulations are used to understand the device behavior and failure under the peculiar two-pulse shaped IEC current waveform. Device sensitivity to different components in the stimulus is studied in detail.

Item Type: Conference Paper
Publication: Electrical Overstress/Electrostatic Discharge Symposium Proceedings
Publisher: ESD Association
Additional Information: The copyright for this article belongs to ESD Association.
Keywords: Failure (mechanical), Automotive applications; Device sensitivity; Failure mechanism; Stress current; System levels; TCAD simulation; Waveform shape; Window failures, Electrostatic discharge
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited: 14 Feb 2023 08:35
Last Modified: 14 Feb 2023 08:35
URI: https://eprints.iisc.ac.in/id/eprint/80230

Actions (login required)

View Item View Item