A super-quadratic lower bound for depth four arithmetic circuits

Gupta, N and Saha, C and Thankey, B (2020) A super-quadratic lower bound for depth four arithmetic circuits. In: Leibniz International Proceedings in Informatics, LIPIcs, 28 July - 31 July 2020, Virtual, Online.

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Abstract

We show an Ω(e n2.5) lower bound for general depth four arithmetic circuits computing an explicit n-variate degree-Θ(n) multilinear polynomial over any field of characteristic zero. To our knowledge, and as stated in the survey [88], no super-quadratic lower bound was known for depth four circuits over fields of characteristic 6= 2 before this work. The previous best lower bound is Ω(e n1.5) [85], which is a slight quantitative improvement over the roughly Ω(n1.33) bound obtained by invoking the super-linear lower bound for constant depth circuits in [73,86]. Our lower bound proof follows the approach of the almost cubic lower bound for depth three circuits in [53] by replacing the shifted partials measure with a suitable variant of the projected shifted partials measure, but it differs from [53]'s proof at a crucial step - namely, the way “heavy” product gates are handled. Loosely speaking, a heavy product gate has a relatively high fan-in. Product gates of a depth three circuit compute products of affine forms, and so, it is easy to prune Θ(n) many heavy product gates by projecting the circuit to a low-dimensional affine subspace [53,87]. However, in a depth four circuit, the second (from the top) layer of product gates compute products of polynomials having arbitrary degree, and hence it was not clear how to prune such heavy product gates from the circuit. We show that heavy product gates can also be eliminated from a depth four circuit by projecting the circuit to a low-dimensional affine subspace, unless the heavy gates together account for Ω(e n2.5) size. This part of our argument is inspired by a well-known greedy approximation algorithm for the weighted set-cover problem.

Item Type:	Conference Paper
Publication:	Leibniz International Proceedings in Informatics, LIPIcs
Publisher:	Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing
Additional Information:	The copyright for this article belongs to Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing
Keywords:	Approximation algorithms; Computational complexity; Timing circuits, Affine subspaces; Arithmetic circuit; Constant-depth circuits; Depth three circuits; Greedy approximation algorithms; Lower-bound proofs; Multilinear polynomials; Weighted set covers, Logic circuits
Department/Centre:	Division of Electrical Sciences > Computer Science & Automation
Date Deposited:	06 Feb 2023 06:31
Last Modified:	06 Feb 2023 06:31
URI:	https://eprints.iisc.ac.in/id/eprint/79852

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