FPGA based Compressive Sensing Framework for Video Compression on Edge Devices

Ayub, AB and Nath, PK and Rangan, V and Thakur, CS (2020) FPGA based Compressive Sensing Framework for Video Compression on Edge Devices. In: 2020 24th International Symposium on VLSI Design and Test, VDAT 2020, 23 - 25 July 2020, Bhubaneswar.

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Abstract

Compressive Sensing (CS) is an emerging signal processing methodology, which compresses the signal being acquired at the time of sensing. As it relies on the sparsity of the signals, CS allows us to sample the signal at a rate much below the Nyquist sampling rate. Recent advancements in CS made us able to capture compressed videos and images on a sensory level in the camera. As CS cameras are still in the research phase, it is not commercially available. In this paper, we propose a simple FPGA based hardware architecture which makes conventional cameras to produce the compressive sensed video. Here the proposed hardware architecture emulates the sensing methodology of pixel-wise coded exposure imaging for 13x compression, which can be modified based on applications. Our framework does not require any changes to the conventional image sensor as it feeds off the video from the same sensor, this is a huge advantage over previous works in CS video compression. Our implementation results show that the proposed method is effective and easily adaptable to any conventional camera. The proposed framework can be deployed on edge devices with low-cost conventional camera to reduce the communication data rate and help in saving the significant power. © 2020 IEEE.

Item Type:	Conference Paper
Publication:	2020 24th International Symposium on VLSI Design and Test, VDAT 2020
Publisher:	Institute of Electrical and Electronics Engineers Inc.
Additional Information:	The copyright for this article belongs to Institute of Electrical and Electronics Engineers Inc.
Keywords:	Cameras; Compressed sensing; Field programmable gate arrays (FPGA); VLSI circuits, Communication data; Compressed video; Compressive sensing; Conventional camera; Hardware architecture; Low costs; Nyquist sampling rate, Image compression
Department/Centre:	Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology) Division of Physical & Mathematical Sciences > Mathematics
Date Deposited:	05 Feb 2023 04:48
Last Modified:	05 Feb 2023 04:48
URI:	https://eprints.iisc.ac.in/id/eprint/79841

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