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GPU-Accelerated Sparse LU Factorization for Power System Simulation

Gnanavignesh, R and Shenoy, UJ (2019) GPU-Accelerated Sparse LU Factorization for Power System Simulation. In: 2019 IEEE PES Innovative Smart Grid Technologies Europe, ISGT-Europe 2019, 29 September - 2 October 2019, Bucharest.

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Official URL: https://doi.org/10.1109/ISGTEurope.2019.8905648

Abstract

Sparse matrix LU factorization is one of the core modules in power system simulation tools. This paper deals with the usage of Graphical Processing Unit(GPU) for accelerating LU factorization. Out of the many methods found in literature, the hybrid column based right-looking LU factorization is considered to be better in terms of parallelization. The column/node level concurrency available in the hybrid column based right looking factorization algorithm is enhanced by utilizing the structural symmetry property of non-zeros in the Jacobian. Jess-Kees' algorithm is employed to obtain a matrix re-ordering scheme, which maximizes parallelism. The proposed method is tested on Jacobians of varying dimensions occurring in the power flow problem on a NVIDIA Quadro P5000 GPU. Significant speedups are obtained over CPU-based serial sparse system solvers like UMFPACK and KLU, demonstrating the effectiveness of the proposed methodology. © 2019 IEEE.

Item Type: Conference Paper
Publication: Proceedings of 2019 IEEE PES Innovative Smart Grid Technologies Europe, ISGT-Europe 2019
Publisher: Institute of Electrical and Electronics Engineers Inc.
Additional Information: The copyright for this article belongs to Institute of Electrical and Electronics Engineers Inc.
Keywords: Computer graphics; Computer graphics equipment; Electric load flow; Electric power transmission networks; Factorization; Jacobian matrices; Program processors; Smart power grids; Trees (mathematics), Elimination tree; Factorization algorithms; Graphical processing units; Jacobians; LU factorization; Power flow problem; Power system simulations; Structural symmetry, Graphics processing unit
Department/Centre: Division of Electrical Sciences > Electrical Engineering
Date Deposited: 06 Jan 2023 09:03
Last Modified: 06 Jan 2023 09:03
URI: https://eprints.iisc.ac.in/id/eprint/78829

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