Low power neuromorphic analog system based on sub-threshold current mode circuits.

Gupta, S and Kumar, P and Kumar, K and Chakraborty, S and Thakur, CS (2019) Low power neuromorphic analog system based on sub-threshold current mode circuits. In: 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019, 26 - 29 May 2019, Sapporo.

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Abstract

Hardware implementation of brain-inspired algorithms such as reservoir computing, neural population coding and deep learning (DL) networks is useful for edge computing devices. The need for hardware implementation of neural network algorithms arises from the high resource utilization in form of processing and power requirements, making them difficult to integrate with edge devices. In this paper, we propose a non-spiking four quadrant current mode neuron model that has a generalized design to be used for population coding, echo-state networks (uses reservoir network), and DL networks. The model is implemented in analog domain with transistors in sub-threshold region for low power consumption and simulated using 180nm technology. The proposed neuron model is configurable and versatile in terms of non-linearity, which empowers the design of a system with different neurons having different activation functions. The neuron model is more robust in case of population coding and echo-state networks (ESNs) as we use random device mismatches to our advantage. The proposed model is current input and current output, hence, easily cascaded together to implement deep layers. The system was tested using the classic XOR gate classification problem, exercising 10 hidden neurons with population coding architecture. Further, derived activation functions of the proposed neuron model have been used to build a dynamical system, input controlled oscillator, using ESNs. © 2019 IEEE

Item Type:	Conference Paper
Publication:	Proceedings - IEEE International Symposium on Circuits and Systems
Publisher:	Institute of Electrical and Electronics Engineers Inc.
Additional Information:	The copyright for this article belongs to Institute of Electrical and Electronics Engineers Inc.
Keywords:	Chemical activation; Codes (symbols); Cognitive systems; Deep learning; Dynamical systems; Neural networks; Neurons; Timing circuits, Analog VLSI; Hardware accelerators; Hardware implementations; Low-power consumption; Neural network algorithm; Neuromorphic engineering; Resource utilizations; Sub-threshold current, Low power electronics
Department/Centre:	Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited:	02 Dec 2022 07:15
Last Modified:	02 Dec 2022 07:15
URI:	https://eprints.iisc.ac.in/id/eprint/77947

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