Bhattacharjee, S and Ganapathi, KL and Mohan, S and Bhat, N (2017) Interface engineering of high-k dielectrics and metal contacts for high performance top-gated MoS2 FETs. In: 15th Symposium on Semiconductors, Dielectrics, and Metals for Nanoelectronics: In Memory of Samares Kar - 232nd ECS Meeting, 1 - 5 October 2017, National Harbor, pp. 101-107.
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Abstract
A combination of contact and gate dielectric engineering is utilized to achieve very high performance few layer MoS2 FET. Sulfur treatment before the formation of Ni and Pd source/drain contacts helps in reducing the schottky barrier height and thereby resulting in 10× reduction in contact resistance. The e-beam evaporated 30nm HfO2 gate dielectric, with optimized processing condition, yields 6.1nm EOT, with interface trap density in the mid 1011 /cm2 range. The top gated MoS2 FET demonstrates field effect mobility of 63 cm2/V-sec. This FET is used along with a depletion mode n-channel FET load, to demonstrate inverter circuit characteristics with output to input gain of 9.
Item Type: | Conference Paper |
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Publication: | ECS Transactions |
Publisher: | Electrochemical Society Inc. |
Additional Information: | The copyright for this article belongs to Electrochemical Society Inc. |
Keywords: | Dielectric materials; Field effect transistors; Gate dielectrics; Hafnium oxides; Layered semiconductors; Molybdenum compounds; Schottky barrier diodes, Dielectric engineering; Field-effect mobilities; HfO2 gate dielectrics; Interface engineering; Interface trap density; Inverter circuit; Processing condition; Schottky barrier heights, High-k dielectric |
Department/Centre: | Division of Interdisciplinary Sciences > Centre for Nano Science and Engineering |
Date Deposited: | 28 Jul 2022 09:52 |
Last Modified: | 28 Jul 2022 09:52 |
URI: | https://eprints.iisc.ac.in/id/eprint/74666 |
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