Gurrala, G and Challa, KK and Rajesh, KB (2022) Development of a Generalized Scaled-Down Realistic Substation Laboratory Model for Smart Grid Research and Education. In: IEEE Access, 10 . pp. 5424-5439.
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Abstract
This paper introduces a physical scaled-down realistic substation laboratory model development for translational research and education in smart grids. The development of a substation panel with four 3-φ feeders of 415 V, 65 A rating is described in detail. The developed substation model can be configured to realize seven widely used substation bus bar arrangements. A programmable logic controller (PLC) is used to create interlock mechanisms for mimicking the actual substation operation practices. Provision is made to realize the gang and independent pole operation of circuit breakers, the manual and remote modes of operation, and different types of current transformer arrangements. The substation panel can host up to 10 commercial IEDs, and multiple substation panels can be cascaded to form a bigger station using the master-slave configuration of PLCs. All the potential transformer and current transformer measurements, circuit breaker, isolator, and earth switch status signals are made available for connecting field devices. The developed substation model can be used for advanced research on substation automation using IEC61850, validation of new protection strategies, implementation and testing of new algorithms (such as topology processing, state estimation) for energy management systems (EMS) like how they get implemented in the field.
Item Type: | Journal Article |
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Publication: | IEEE Access |
Publisher: | Institute of Electrical and Electronics Engineers Inc. |
Additional Information: | The copyright for this article belongs to the Authors. |
Keywords: | Busbars; Circuit simulation; Computer circuits; Electric circuit breakers; Electric instrument transformers; Electric power transmission networks; Energy management systems; Integrated circuits; Smart power grids; Topology, Bar arrangement; Bus bar arrangement; Bus bars; Bus-breaker model; Circuit-breakers; Integrated circuit modeling; Interlock logic; Isolator; Substation, Timing circuits |
Department/Centre: | Division of Electrical Sciences > Electrical Engineering |
Date Deposited: | 08 Jul 2022 05:44 |
Last Modified: | 08 Jul 2022 05:44 |
URI: | https://eprints.iisc.ac.in/id/eprint/74253 |
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