Siddique, M D and Reddy, B P and Meraj, M and Iqbal, A (2022) A new high-level boost inverter topology with reduced device count. In: International Journal of Circuit Theory and Applications .
Full text not available from this repository. (Request a copy)Abstract
The requirement of a boosting aspect for the power electronic converter is essential for the fuel cell, solar PV, and battery-based applications as the generated voltage is of low voltage magnitude. In these low-voltage applications, a new boost inverter topology has been suggested, where the power conversion will happen in a single-stage instead of two-stage (dc�dc converter + two-level inverter). The proposed topology consists of 11 power semiconductor devices, one switched capacitor unit, and two dc voltage sources that are arranged in the magnitude of 1:3. This arrangement is able to achieve an output voltage of 15 levels with a boosting factor of 1.75. The other advantages of the designed topology have been the reduced device count with the self-balancing of capacitor voltage and improved efficiency with better power loss sharing among the switches. By accumulating additional switched-capacitor units to the proposed basic structure, the proposed inverter can be extended to support a greater number of levels and a higher voltage gain. A comprehensive assessment has been accomplished with single-source and dual-source topologies, and the proposed topology shows the improved design. A low-power laboratory porotype has been used to endorse the proposed topology with real-time conditions. © 2022 John Wiley & Sons, Ltd.
Item Type: | Journal Article |
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Publication: | International Journal of Circuit Theory and Applications |
Publisher: | John Wiley and Sons Ltd |
Additional Information: | The copyright for this article belongs to John Wiley and Sons Ltd |
Keywords: | Electric inverters; Fuel cells; Semiconductor devices, Boost inverters; High-level topology; Inverter topologies; Multi Level Inverter (MLI); New high; Power conversion; Power electronics converters; Single stage; Single-stage power conversion; Switched capacitor, Topology |
Department/Centre: | Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology) |
Date Deposited: | 23 May 2022 05:59 |
Last Modified: | 23 May 2022 05:59 |
URI: | https://eprints.iisc.ac.in/id/eprint/71844 |
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