BDD-based synthesis approach for in-memory logic realization utilizing Memristor Aided loGIC (MAGIC)

Chakraborty, A and Gupta, PS and Singh, R and Das, R and Rahaman, H (2021) BDD-based synthesis approach for in-memory logic realization utilizing Memristor Aided loGIC (MAGIC). In: Integration, 81 . pp. 254-267.

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Abstract

In-Memory computation has received considerable attention in the light of recent advances made in the memristor-based design. Non-volatile memristor devices are compatible with both the crossbar structure, CMOS technology, and can perform logical operations when subjected to suitable voltages. In this work, a generalized synthesis technique is presented to implement the logic functions inside pure memristive-crossbar. To initiate the process, two novel memristive-designs are proposed for 2:1 multiplexer (MUX) that follow Memristor Aided loGIC (MAGIC) design style. Experimental results showed that each design is at least 68.05 , 35.92 more energy-efficient than their existing IMPLY, MAGIC-based designs, respectively. One of our proposed MUX designs is optimized in memristor-count, and the other is latency-optimized. The latency-optimized design offers 20 improvement in performance compared to its existing IMPLY, MAGIC-based peers. Based on the simulation methodology presented in this work, the memristive-MUXes are simulated in Cadence Virtuoso. Subsequently, our proposed MUX designs are used for the technology mapping of the nodes of the Binary Decision Diagrams (optimized in terms of node, path counts) for the logic functions. Our proposed technique optimizes the implemented logic circuits in terms of memristor-count, step-count, and provides the details for � latency, required memristors, energy, area. Comparison of the synthesis results showed that the circuits generated using our proposed MAGIC-MUXes, are at least 82.21 , 44 more energy-efficient, and can offer 18.94 , 18.92 more performance-improvements than their peers, realized using the existing IMPLY, MAGIC-MUX designs, respectively. Also, our proposed-MUX based circuits need at least 56.73 lesser crossbar-areas than their existing MAGIC-MUX based peers, which indicates the scope for large scale parallel processing inside a given memristive-memory. © 2021

Item Type:	Journal Article
Publication:	Integration
Publisher:	Elsevier B.V.
Additional Information:	The copyright for this article belongs to Elsevier B.V.
Keywords:	Binary decision diagrams; Boolean functions; Energy efficiency; Memristors, Cross-bar structures; Large-scale parallel processing; Logical operations; Memory computations; Optimized designs; Simulation methodology; Synthesis techniques; Technology mapping, Computer circuits
Department/Centre:	Division of Electrical Sciences > Electrical Communication Engineering
Date Deposited:	24 Sep 2021 07:55
Last Modified:	24 Sep 2021 07:55
URI:	http://eprints.iisc.ac.in/id/eprint/69733

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