A method to model Vccinfeedthrough Noise in Microprocessors with Fully Integrated Voltage Regulators - Distributed Formulation

Govindan, S and Bharath, K and Gope, D and Venkataraman, S and Ambasana, N (2019) A method to model Vccinfeedthrough Noise in Microprocessors with Fully Integrated Voltage Regulators - Distributed Formulation. In: 2019 IEEE 28th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS), 6-9 Oct. 2019, Montreal, QC, Canada, Canada.

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Abstract

Modern high perfomance server microprocessors processors have built-in Fully Integrated Voltage Regulators (FIVR) to generate the on-chip power domains. The multiple FIVRs in the chip share a common input power network for platform VRM cost reduction. However the load current transitions at the output of one FIVR can couple to the other FIVR through the input network and deteriorate its performance. In this paper we extend our earlier lumped formulation to include distributed models of the converters. © 2019 IEEE.

Item Type:	Conference Proceedings
Publication:	2019 IEEE 28th Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2019
Series.:	28th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2019; McGill University CampusMontreal; Canada; 6 October 2019 through 9 October 2019; Category number CFP19EPP-ART; Code 159504
Publisher:	Institute of Electrical and Electronics Engineers Inc.
Additional Information:	cited By 0; Conference of 28th IEEE Conference on Electrical Performance of Electronic Packaging and Systems, EPEPS 2019 ; Conference Date: 6 October 2019 Through 9 October 2019; Conference Code:159504
Keywords:	Inductors, Voltage control, Matrices, System-on-chip, Capacitors ,Regulators ,Load modeling
Department/Centre:	Division of Electrical Sciences > Electrical Communication Engineering
Date Deposited:	14 Sep 2020 06:05
Last Modified:	14 Sep 2020 06:05
URI:	http://eprints.iisc.ac.in/id/eprint/65540

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