Dewani, R and Gopakumar, K and Rakesh, R and Majumdar, MG and Umanand, L (2020) A Novel approach for the analysis of Harmonic Suppression in higher-sided polygonal SV structures. In: 2020 IEEE International Conference on Power Electronics, Smart Grid and Renewable Energy, 2 - 4 January 2020, Cochin; India.
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Abstract
This paper presents a novel method for the exact harmonic analysis of higher sided polygonal Space Vector (SV) structures. The method gives intuitive insight of the lower order harmonic cancellation as the SV structure is extended to higher sided polygons. The work presents a method of visualizing any higher sided SV structure as a combination of hexagonal SV structures. As the alignment of a polygon with α - axis is varied, the magnitude of harmonics remains same and the phase varies. Thus, hexagons with different alignments with respect to α - axis can be combined to cancel lower order harmonics. Since the fundamental components add in-phase, the overall harmonic distortion in phase voltage is suppressed. The work also establishes that the harmonic suppression scheme works regardless of the orientation of the polygonal space vectors with respect to alpha axis. The phase voltage waveform for a p-sided polygon can be visualized as being generated from a sampled sine wave. This work not only presents a formal analysis for suppression of lower order harmonics, but also presents the analysis of overall improvement in Total Harmonic Distortion (THD) of the phase voltages due to cancellation of lower order harmonics in higher sided SV structures. The analysis is then generalized to larger SV structures. © 2020 IEEE.
Item Type: | Conference Paper |
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Publication: | 2020 IEEE International Conference on Power Electronics, Smart Grid and Renewable Energy, PESGRE 2020 |
Publisher: | Institute of Electrical and Electronics Engineers Inc. |
Additional Information: | Copyright of this article belongs to the Institute of Electrical and Electronics Engineers Inc. |
Department/Centre: | Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology) |
Date Deposited: | 27 May 2021 13:21 |
Last Modified: | 27 May 2021 13:21 |
URI: | http://eprints.iisc.ac.in/id/eprint/65516 |
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