Double Gate Drain Extended MOS with Low on-Resistance for RF Application

Ajay, A (2020) Double Gate Drain Extended MOS with Low on-Resistance for RF Application. In: Silicon .

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Abstract

In this work, a double gate drain extended metal�oxide�semiconductor (DG DeMOS) device has been investigated. Second gate is considered at body side of conventional drain extended MOS (Conv. DeMOS) which helps to enhance the on-state current of DG DeMOS. The study of both the devices has been carried out using the Sentaurus simulator. In the simulation studies, all the dimensions and doping parameters of both devices have been kept the same except gate length and channel doping. The simulation studies have shown a significant improvement in DG DeMOS device parameters in comparison to the Conv. DeMOS device. The DG DeMOS device provides high breakdown voltage, low on-resistance, low gate capacitance (Cgg), low gate to drain capacitance (Cgd), high cut-off frequency (Ft) and maximum operating frequency (Fmax) and better trans-conductance and intrinsic power gain (S21) as compared to Conv. DeMOS device. These features make the DG DeMOS device an excellent candidate for RF applications. © 2020, Springer Nature B.V.

Item Type:	Journal Article
Publication:	Silicon
Publisher:	Springer
Additional Information:	The copyright of this article belongs to Springer
Keywords:	Electric breakdown; Semiconductor doping, DeMOS; Double gate; Maximum oscillation frequency; On-resistance; Radio frequencies, Capacitance
Department/Centre:	Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited:	10 Aug 2020 05:16
Last Modified:	10 Aug 2020 05:16
URI:	http://eprints.iisc.ac.in/id/eprint/65185

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