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Novel Drain-Connected Field Plate GaN HEMT Designs for Improved VBD-RON Tradeoff and RF PA Performance

Soni, A and Ajay, . and Shrivastava, M (2020) Novel Drain-Connected Field Plate GaN HEMT Designs for Improved VBD-RON Tradeoff and RF PA Performance. In: IEEE Transactions on Electron Devices, 67 (4). pp. 1718-1725.

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Official URL: https://dx.doi.org/10.1109/TED.2020.2976636

Abstract

TCAD studies are performed to develop physical insights into the breakdown behavior of drain-connected field plate-based GaN HEMTs. Using the developed insights, to mitigate the performance bottleneck caused by the lateral drain-connected field plate design, we have proposed novel vertical-field-plate designs. The proposed designs alleviate the channel electric field by uniformly distributing it vertically into the GaN buffer region. As a result, the proposed vertical and dual-field-plate design offer 2 × and 3 × improvements in breakdown voltage, respectively, compared with the design without field plate. Similarly, compared with a design with a lateral field plate, a 50 improvement in the breakdown voltage was seen with dual-field-plate architecture. RF power amplifier (PA) performance extracted using load-pull simulations demonstrates an improved RF PA linearity at higher drain bias, improved output power, efficiency, and PA gain for HEMTs with dual- and vertical-field-plate designs. © 1963-2012 IEEE.

Item Type: Journal Article
Publication: IEEE Transactions on Electron Devices
Publisher: Institute of Electrical and Electronics Engineers Inc
Additional Information: Copyright of this article belongs to Institute of Electrical and Electronics Engineers Inc
Keywords: Aluminum gallium nitride; Electric breakdown; Electronic design automation; III-V semiconductors; Power amplifiers, AlGaN/GaN HEMTs; Breakdown behavior; Field plates; GaN buffer; Output power; Performance bottlenecks; RF power amplifiers; Vertical fields, Gallium nitride
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited: 23 Sep 2020 09:23
Last Modified: 23 Sep 2020 09:23
URI: http://eprints.iisc.ac.in/id/eprint/65161

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