ePrints@IIScePrints@IISc Home | About | Browse | Latest Additions | Advanced Search | Contact | Help

Minimization of Switched Capacitor Voltage Ripple in a Multilevel Dodecagonal Voltage Space Vector Structure for Drives

Imthias, Mohammed and Raj, Krishna R and Yadav, Apurv Kumar and Gopakumar, K and Umanand, L and Cecati, Carlo (2020) Minimization of Switched Capacitor Voltage Ripple in a Multilevel Dodecagonal Voltage Space Vector Structure for Drives. In: IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 67 (1). pp. 126-135.

[img] PDF
iee_tra_ind_ele_67-1_126_2020.pdf - Published Version
Restricted to Registered users only

Download (4MB) | Request a copy
Official URL: http://dx.doi.org/10.1109/TIE.2019.2893825


A multilevel dodecagonal voltage space vector generation scheme for variable-speed drive applications with single-dc-link operation requires a large value of capacitance for cascaded H-bridge (CHB) filters, when operated at lower speeds. In existing schemes, the multilevel dodecagonal structure is obtained by cascading a flying capacitor inverter with a CHB. In this paper, a new scheme has been proposed to minimize the capacitance requirement for full speed operation by creating vector redundancies using modular and equal voltage CHBs. Also, an algorithm has been developed to optimize the selection of vector redundancies among the CHBs in order to minimize the voltage ripple of the floating capacitors. The proposed algorithm considers instantaneous capacitor voltages and phase currents for optimal selection of vector redundancies. A mathematical model for capacitor voltage deviation is presented, and the effectiveness of the proposed algorithm is verified in both the simulation and the experiment.

Item Type: Journal Article
Additional Information: Copyright of this article belongs to IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords: Induction motor drives; multilevel inverters; pulsewidth modulated (PWM) power converters
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited: 21 Nov 2019 05:58
Last Modified: 21 Nov 2019 05:58
URI: http://eprints.iisc.ac.in/id/eprint/63794

Actions (login required)

View Item View Item