A 5-Level Inverter Scheme Using Single DC Link With Reduced Number of Floating Capacitors and Switches for Open-End IM Drives

Majumder, Mriganka Ghosh and Yadav, Apurv Kumar and Gopakumar, K and Raj, Krishna R and Loganathan, Umanand and Garcia Franquelo, Leopoldo (2020) A 5-Level Inverter Scheme Using Single DC Link With Reduced Number of Floating Capacitors and Switches for Open-End IM Drives. In: IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 67 (2). pp. 960-968.

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Abstract

This paper presents a 5-level inverter topology for open-end induction motor drives by using a single dc source. The open stator windings of the drive are supplied with a 3-level flying capacitor inverter from one end and capacitor-fed 2-level inverter from another end. The voltage ratio of the dc link to the capacitor in 2-level inverter is maintained at 4:1 ratio to generate five-level voltage output. The capacitor in 2-level inverter is balanced by the switching redundant vector combinations from both the inverters while the floating capacitors in the 3-level inverter are balanced by using redundant switching states. The proposed topology gives 5-level operation with less number of floating capacitors and power semiconductor switches compared to other existing topologies. Also, the balancing of the capacitors is independent of load power factor and modulation index. Further, the generalization of the proposed dual inverter scheme for any n-level inverter is also included in this paper. The experimental results and required analysis are also presented to validate the inverter scheme.

Item Type:	Journal Article
Publication:	IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Publisher:	IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Additional Information:	Copyright of this article belongs to IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Keywords:	Flying capacitor (FC); open-end induction motor (OEIM) drive; pulsewidth modulation (PWM); space vector (SV); 5-level multilevel inverter (MLI)
Department/Centre:	Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited:	21 Nov 2019 05:53
Last Modified:	21 Nov 2019 05:53
URI:	http://eprints.iisc.ac.in/id/eprint/63792

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