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Generation of High-Resolution 12-Sided Voltage Space Vector Structure Using Low-Voltage Stacked and Cascaded Basic Inverter Cells

Yadav, Apurv Kumar and Boby, Mathews and Pramanick, Sumit Kumar and Gopakumar, K and Umanand, Loganathan and Franquelo, Leopoldo G (2018) Generation of High-Resolution 12-Sided Voltage Space Vector Structure Using Low-Voltage Stacked and Cascaded Basic Inverter Cells. In: IEEE TRANSACTIONS ON POWER ELECTRONICS, 33 (9). pp. 7349-7358.

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Official URL: https://dx.doi.org/10.1109/TPEL.2017.2764541

Abstract

This paper proposes generation of a 15-level (14 concentric) dodecagonal voltage space vector structure (DVSVS) for a star connected induction motor drive. The proposed multilevel DVSVS is obtained by cascading two inverters, namely a primary and secondary inverter. The primary inverter is a five-level (5L) structure formed by stacking two three-level flying capacitors with individual reduced dc sources and the secondary inverter is also a 5L structure formed by cascading two capacitor-fed cascaded H-bridges (CHB). The active power is supplied by the primary inverter, while the secondary inverter acts as switched capacitor harmonics filter, and capacitors in the secondary inverter are balanced naturally irrespective of load power factor for entire modulation index. The high-voltage dc supply fed primary inverter is operated in quasi-square wave mode, while the high frequency switching is applied to low voltage CHBs, thus, reducing the overall switching loss. The proposed scheme gives the advantages of both DVSVS and multilevel structure, thus, making it one of the solutions for battery or stacked dc-fed applications. The paper also presents the experimental results as well as comparison study with the existing topologies to support the advantages of proposed scheme.

Item Type: Journal Article
Publication: IEEE TRANSACTIONS ON POWER ELECTRONICS
Publisher: IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, NJ 08855-4141 USA
Additional Information: Copyright of this article belong to IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC, 445 HOES LANE, PISCATAWAY, NJ 08855-4141 USA
Department/Centre: Division of Electrical Sciences > Electronic Systems Engineering (Formerly Centre for Electronic Design & Technology)
Date Deposited: 30 Jul 2018 14:40
Last Modified: 30 Jul 2018 14:40
URI: http://eprints.iisc.ac.in/id/eprint/60314

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