Das, Saptarsi and Sivanandan, Nalesh and Madhu, Kavitha T and Nandy, Soumitra K and Narayan, Ranjani (2016) RHyMe: REDEFINE HyperCell Multicore for Accelerating HPC Kernels. In: 29th International Conference on VLSI DESIGN / 15th International Conference on Embedded Systems (VLSID), JAN 04-08, 2016, Kolkata, INDIA, pp. 601-602.
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Abstract
In this paper, we present an architecture named REDEFINE HyperCell Multicore (RHyMe) designed to efficiently realize HPC application kernels, such as loops. RHyMe relies on the compiler to generate the meta-data for its functioning. Most of the orchestration activity for executing kernels is governed by compiler generated meta-data made use of at runtime. In RHyMe, macro operations can be realized as a hardware overlay of MIMO operations on hardware structures called HyperCells. While a HyperCell enables exploiting fine-grain instruction level and pipeline parallelism, coarse-grain parallelism is exploited among multiple HyperCells. Regularity exhibited by computations such as loops results in efficient usage of simple compute hardware such as HyperCells as well as memory structures that can be managed explicitly.
Item Type: | Conference Proceedings |
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Series.: | International Conference on VLSI Design |
Additional Information: | Copy right for this article belongs to the IEEE, 345 E 47TH ST, NEW YORK, NY 10017 USA |
Department/Centre: | Division of Interdisciplinary Sciences > Supercomputer Education & Research Centre |
Date Deposited: | 07 Dec 2016 06:02 |
Last Modified: | 07 Dec 2016 06:02 |
URI: | http://eprints.iisc.ac.in/id/eprint/55564 |
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