A Flexible Scalable Hardware Architecture for Radial Basis Function Neural Networks

Mohammadi, Mahnaz and Satpute, Nitin and Ronge, Rohit and Chandiramani, Jayesh Ramesh and Nandy, SK and Raihan, Aamir and Verma, Tanmay and Narayan, Ranjani and Bhattacharya, Sukumar (2015) A Flexible Scalable Hardware Architecture for Radial Basis Function Neural Networks. In: 28th International Conference on VLSI Design (VLSID) / 14th International Conference on Embedded Systems, JAN 03-07, 2015, Bangalore, INDIA, pp. 505-510.

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Abstract

Radial Basis Function Neural Networks (RBFNN) are used in variety of applications such as pattern recognition, control and time series prediction and nonlinear identification. RBFNN with Gaussian Function as the basis function is considered for classification purpose. Training is done offline using K-means clustering method for center learning and Pseudo inverse for weight adjustments. Offline training is done since the objective function with any fixed set of weights can be computed and we can see whether we make any progress in training. Moreover, minimum of the objective function can be computed to any desired precision, while with online training none of these can be done and it is more difficult and unreliable. In this paper we provide the comparison of RBFNN implementation on FPGAs using soft core processor based multi-processor system versus a network of HyperCells 8], 13]. Next we propose three different partitioning structures (Linear, Tree and Hybrid) for the implementation of RBFNN of large dimensions. Our results show that implementation of RBFNN on a network of HyperCells using Hybrid Structure, has on average 26x clock cycle reduction and 105X improvement in the performance over that of multiprocessor system on FPGAs.

Item Type:	Conference Paper
Series.:	International Conference on VLSI Design
Additional Information:	Copy right for this article belongs to the IEEE COMPUTER SOC, 10662 LOS VAQUEROS CIRCLE, PO BOX 3014, LOS ALAMITOS, CA 90720-1264 USA
Department/Centre:	Division of Interdisciplinary Sciences > Supercomputer Education & Research Centre
Date Deposited:	07 Dec 2016 04:34
Last Modified:	07 Dec 2016 04:34
URI:	http://eprints.iisc.ac.in/id/eprint/55447

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